ISL54059EVAL1Z Intersil, ISL54059EVAL1Z Datasheet - Page 8

• Manufacturer Part Number: ISL54059EVAL1Z
• Description: EVALUATION BOARD FOR ISL54059
• Manufacturer: Intersil

Specifications of ISL54059EVAL1Z

• Main Purpose: Interface, 2:1 Multiplexer
• Embedded: No
• Utilized Ic / Part: ISL54059
• Primary Attributes: 2 x SPDT Analog Switch
• Secondary Attributes: 1.8 V ~ 6.5 V Supply
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Test Circuits and Waveforms
Detailed Description
The ISL54059 is a bi-directional, dual single pole-double
throw (SPDT) analog switch that offers precise switching
from a single 1.8V to 6.5V supply with low ON-resistance
(0.83Ω) and high speed operation (t
The device is especially well suited for portable battery
powered equipment due to its low operating supply voltage
(1.8V), low power consumption (8nA), and a tiny 1.8x1.4mm
µTQFN package or a 3x3mm TDFN package. The low
ON-resistance and r
loss and signal distortion for applications that require signal
switching with minimal interference by the switch.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. The ISL54059
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
SIGNAL
GENERATOR
*50Ω SOURCE
ANALYZER
SIGNAL
GENERATOR
*50Ω SOURCE
ANALYZER
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
R
0V OR V+
L
R
L
ON
flatness provide very low insertion
NO1 OR NC1
IN
COM2
X
NO OR NC
COM
8
GND
GND
NC2 OR NO2
ON
= 55ns, t
V+
COM1
(Continued)
V+
IN
C
C
OFF
0V OR V+
= 18ns).
50Ω
NC
ISL54059
contains ESD protection diodes on each pin of the IC
(see Figure 8). These diodes connect to either a +Ring or
-Ring for ESD protection. To prevent forward biasing the
ESD diodes to the +Ring, V+ must be applied before any
input signals, and the input signal voltages must remain
between recommended operating range.
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provided additional protection to limit the current in the
event that the voltage at a logic pin or switch terminal goes
above the V+ rail.
Logic inputs can be protected by adding a 1kΩ resistor in
series with the logic input (see Figure 8). The resistor limits
Repeat test for all switches.
V
COM is connected to NO or NC
during ON capacitance measurement.
IMPEDANCE
NX
ANALYZER
r
ON
100mA
FIGURE 7. CAPACITANCE TEST CIRCUIT
= V
1
/100mA
FIGURE 5. r
V
1
COM
NO OR NC
ON
NO OR NC
COM
TEST CIRCUIT
GND
GND
V+
IN
V+
IN
C
0V OR V+
March 11, 2011
0V OR V+
C
FN6579.2