ISL6118EVAL1 Intersil, ISL6118EVAL1 Datasheet - Page 3

• Manufacturer Part Number: ISL6118EVAL1
• Description: EVALUATION PLATFORM FOR ISL6118
• Manufacturer: Intersil

Specifications of ISL6118EVAL1

• Main Purpose: Power Management, Hot Swap Controller
• Utilized Ic / Part: ISL6118
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

J1
+VBUS
ISL6116 (+5V) Figures
ISL6116 (-12V)
Figures 6 and 7 show the ISL6116 reconfigured for -12V low
side switch application. The following components were
removed: RG1, R6 & R11. C2 was added (0.047µf 0805
size). In Figure 8, notice that GATE is 0V to fully enhance the
FET because of -12V operation. Also note that PGOOD is
disabled due to low side configuration. Upon power up,
current regulation mode is entered and CTIM is immediately
ISL6116 (-12V) Figures
GND
HI J2
FIGURE 6. ISL6116EVAL1 NEGATIVE VOLTAGE LOW SIDE
FIGURE 5A. RESPONSE TO OC DURING OPERATION
LOAD
Ch3PGOOD
Ch1 GATE
Ch2CTIM
C1
CONTROLLER
C3
D2
J3 LO
R7
Q2
DD1
3.3V
ISL6116
U1
R5
R1
R2
3
Ch4 I
(Continued)
C2
-12V APPL.
OUT
R9
R8
-12V*
J4
-VBUS
OT1
REMOVE:
RG1, R6, R11
ADD C2
Technical Brief 457
LOGIN
TP9
R10
ON
OFF
0-5V
FIGURE 5.
begins charging. The nominal time-out period is CTIM x
93kΩ, and again PGOOD is disabled (see Figure 9). An OC
event occurs when the current through the sense resistor
exceeds the user programmed OC threshold (see data
sheet). The controller enters CR mode and capacitor CTIM
begins charging. The nominal time-out period is CTIM x
93kΩ (see Figure 10).
FIGURE 5B. RESPONSE TO FALSE FAULT EVENT
I
CR
FIGURE 7. ISL6116 EVAL BOARD PICTURE
= 1.5A
Ch3 PGOOD
Ch1 +5V
Ch4 I
Ch2 CTIM
LOAD
April 18, 2006
OUT
TB457.0