ISL6118EVAL1 Intersil, ISL6118EVAL1 Datasheet - Page 2

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ISL6118EVAL1

Manufacturer Part Number
ISL6118EVAL1
Description
EVALUATION PLATFORM FOR ISL6118
Manufacturer
Intersil
Datasheet

Specifications of ISL6118EVAL1

Main Purpose
Power Management, Hot Swap Controller
Utilized Ic / Part
ISL6118
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
ISL6116 (+5V)
Figures 1 and 2 show the ISL6116 in an ISL6115 high side
switch application eval board. Jumper JP1 is removed from
the original configuration so a +5V Power Source can be
applied to B2. +12V is needed to bias the IC and is applied
at B1. The overcurrent set point is 1.5A.
In Figure 3, notice the soft-start ramp up of GATE after
PWRON is initiated, thus allowing the gradual ramp up of
I
PWRON being asserted, CTIM is immediately begins
ISL6116 (+5V) Figures
R1
LOAD
Q1
+5V
FIGURE 3. TURN ON VIA PWRON INTO NOMINAL LOAD
. In Figure 4, starting up into a short is shown. Upon
V+ B2
I
CR
= 1.5A
R2
C1
R3
FIGURE 1. EVAL BOARD SCHEMATIC
1
2
3
4
JP1
+
B3
ISL6116
U1
C3
LOAD
V
+12V
BIAS
2
8
7
6
5
Ch2 PWRON
Ch3 PGOOD
Ch4 I
PGOOD
B4
B1
LOAD
+5V
R4
D1
Ch1 GATE
-
C2
R5
PWRON
D2
Technical Brief 457
DD1
3.3V
B5
charging. The nominal time-out period is CTIM x 93kΩ . An
overcurrent (OC) event occurs when the current through the
sense resistor exceeds the user programmed OC threshold
(see data sheet). The controller enters current regulation
(CR) and capacitor CTIM begins charging. The nominal
time-out period is CTIM x 93kΩ. (see Figure 5A). A transient
event from 500mA to 1A occurs. PGOOD is pulled low due
to a temporary undervoltage condition occurring on +5V
but CTIM stays low as a true OC event never occurs (See
Figure 5B).
I
CR
FIGURE 4. TURN ON VIA PWRON INTO SHORT
= 1.5A
FIGURE 2. EVAL BOARD PICTURE
Ch1 GATE
Ch4 I
LOAD
Ch3 PGOOD
Ch2 CTIM
April 18, 2006
TB457.0
OUT
,

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