EVAL-AD5228EBZ Analog Devices Inc, EVAL-AD5228EBZ Datasheet - Page 14

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EVAL-AD5228EBZ

Manufacturer Part Number
EVAL-AD5228EBZ
Description
BOARD EVAL FOR AD5228 DGTL POT
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD5228EBZ

Main Purpose
Digital Potentiometer
Utilized Ic / Part
AD5228
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
AD5228
POWER-UP AND POWER-DOWN SEQUENCES
Because of the ESD protection diodes that limit the voltage
compliance at Terminals A, B, and W (Figure 39), it is
important to power on V
Terminals A, B, and W. Otherwise, the diodes are forward-
biased such that V
affect other parts of the circuit. Similarly, V
powered down last. The ideal power-on sequence is in the
following order: GND, V
V
after V
floating, but they should not be logic low during power-on.
A
, V
B
, and V
DD
. The states of the PU and PD pins can be logic high or
W
is not important as long as they are powered on
DD
is powered on unintentionally and can
DD
DD
, and V
before applying any voltage to
A/B/W
. The order of powering
DD
should be
Rev. A | Page 14 of 20
LAYOUT AND POWER SUPPLY BIASING
It is always a good practice to use compact, minimum lead
length layout design. The leads to the input should be as direct
as possible with a minimum conductor length. Ground paths
should have low resistance and low inductance. It is also good
practice to bypass the power supplies with quality capacitors.
Low ESR (equivalent series resistance) 1 μF to 10 μF tantalum
or electrolytic capacitors should be applied at the supplies to
minimize any transient disturbance and to filter low frequency
ripple. Figure 39 illustrates the basic supply bypassing configu-
ration for the AD5228.
V
DD
Figure 40. Power Supply Bypassing
+
C2
10μF
C1
0.1μF
V
AD5228
DD
GND

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