ATA6612-EK Atmel, ATA6612-EK Datasheet - Page 6
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ATA6612-EK
Manufacturer Part Number
ATA6612-EK
Description
BOARD DEMO LIN-MCM FOR ATA6612
Manufacturer
Atmel
Specifications of ATA6612-EK
Main Purpose
Interface, LIN + MCU
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ATA6612
Primary Attributes
LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
Secondary Attributes
8 kB Flash, 4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 48-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3. Hardware Description
3.1
3.1.1
3.1.2
3.1.3
6
Pin Description
ATA6612/ATA6613
Power Supply (VB and GND)
Voltage Regulator (PVCC and VCC)
The Window Watchdog (NTRIG, WD_OSC and NRES)
In the following sections the external elements required for some of the pins will be shown and
described. For further information about this topic, refer to the relevant datasheet.
In order to get the development board running, an external 5.7V to 18.7V DC power supply
has to be connected to the power connector (positive center connector) or to the terminals “+”
and “-” directly to the right of the power connector. The input circuit is protected against
inverse-polarity with the protection diode D1. This causes a difference of approximately 0.7V
between the supplied voltage V
The internal 5V voltage regulator is capable of driving loads with up to 50 mA current con-
sumption. Therefore, the ATA6612 and ATA6613 are able to supply the internal
microcontroller, some external sensors, and/or other ICs required for the particular LIN node.
The voltage regulator is protected against overloads by means of current limitation and over-
temperature shutdown. To boost the maximum load current, an external NPN transistor may
be used. Its base is connected to the VCC pin and its emitter is connected to PVCC. To enable
this feature, the jumper PVCC, which connects the two pins PVCC and VCC by default, has to
be removed.
As for the most applications 50 mA will be sufficient the jumper PVCC is set per default.
The watchdog anticipates a trigger signal from the microcontroller at the NTRIG input (nega-
tive edge) within a defined time window. If no correct trigger signal is received during the open
window, a reset signal (active low) will be generated at the NRES output. During Silent Mode
or Sleep Mode the watchdog is switched off to reduce current consumption.
The timing basis of the watchdog is provided by the internal oscillator, whose time period t
is adjustable via the external resistor R8 at the WD_OSC pin. All watchdog-specific timings (t
t
51 k mounted on the development board, which results in the following timing sequence for
the integrated watchdog.
2
, t
d
, ...) are based on the value of this resistor. By default there is a resistor with a value of
Bat
and the voltage at the VS pin.
9127A–AUTO–05/08
OSC
1
,