ATA6612-EK Atmel, ATA6612-EK Datasheet - Page 2

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ATA6612-EK

Manufacturer Part Number
ATA6612-EK
Description
BOARD DEMO LIN-MCM FOR ATA6612
Manufacturer
Atmel
Datasheets

Specifications of ATA6612-EK

Main Purpose
Interface, LIN + MCU
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ATA6612
Primary Attributes
LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
Secondary Attributes
8 kB Flash, 4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 48-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
1. Introduction
2
ATA6612/ATA6613
The development board for the ATA6612/ATA6613 IC is designed to give designers a quick
start with the ATA6612 and ATA6613 ICs and to enable prototyping and testing new LIN
designs.
The ATA6612 and ATA6613 form a single-package dual-chip circuit family for LIN-bus slave
and master node applications. They support highly integrated solutions for in-vehicle LIN net-
works. The LIN-system-basis-chip (LIN SBC) consists of a voltage regulator, a window
watchdog, and a fully integrated LIN transceiver, which is in accordance with the LIN specifica-
tion 2.0. The second chip is a microcontroller from Atmel
microcontrollers with advanced RISC architecture (Atmega88 in ATA6612 and the Atmega168
in ATA6613).
The included AVR provides the following features:
• 8/16 Kbytes of in-system programmable flash with read-while-write capabilities
• 512 bytes EEPROM
• 1 Kbyte SRAM
• 23 general purpose I/O lines
• 32 general purpose working registers
• Internal 8 MHz RC Oscillator Calibrated at 5V at 25°C
• 3 flexible timer/counters with compare modes
• Internal and external interrupts
• Serial programmable USART suitable for LIN communication
• Byte-oriented 2-wire serial interface
• SPI serial port
• 8-channel 10-bit ADC
• Five software-selectable power-saving modes:
– Idle Mode stops the CPU while allowing the SRAM, timer/counters, USART, 2-wire
– Power-down Mode saves the register contents but freezes the Oscillator, disabling
– Power-save Mode: the asynchronous timer continues to run, allowing the user to
– ADC Noise Reduction Mode stops the CPU and all I/O modules except
– Standby Mode: the crystal/resonator Oscillator is running while the rest of the
serial interface, SPI port, and interrupt system to continue functioning.
all other chip functions until the next interrupt or hardware reset.
maintain a timer base while the rest of the device is sleeping.
asynchronous timer and ADC, to minimize switching noise during ADC
conversions.
device is sleeping. This allows very fast start-up combined with low power
consumption.
®
’s series of AVR
9127A–AUTO–05/08
®
8-bit

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