CDB5464U Cirrus Logic Inc, CDB5464U Datasheet - Page 6

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CDB5464U

Manufacturer Part Number
CDB5464U
Description
BOARD EVAL FOR CS5464 ADC
Manufacturer
Cirrus Logic Inc
Type
A/Dr
Datasheets

Specifications of CDB5464U

Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS5464
Primary Attributes
Watt-Hour Meter
Secondary Attributes
Graphical User Interface, SPI™ & USB Interfaces
Product
Data Conversion Development Tools
Maximum Clock Frequency
4 MHz
Interface Type
USB
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
For Use With/related Products
CS5464
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1554
CDB-5464U
2. PIN DESCRIPTION
6
Clock Generator
Crystal Out
Crystal In
CPU Clock Output
Control Pins and Serial Data I/O
Serial Clock
Serial Data Output
Chip Select
Mode Select
Energy Outputs
Reset
Interrupt
Serial Data Input
Analog Inputs/Outputs
Differential Voltage Inputs
Differential Current Inputs
Power Fail Monitor
Voltage Reference Output
Voltage Reference Input
Power Connections
Positive Digital Supply
Digital Ground
Positive Analog Supply
Analog Ground
Other Pins
Test1, Test2
Voltage Reference Output
Differential Voltage Input
Differential Voltage Input
Voltage Reference Input
Positive Digital Supply
CPU Clock Output
Serial Data Ouput
Digital Ground
Mode Select
Factory Test
Factory Test
Serial Clock
Chip Select
Crystal Out
22, 25,
20,19,
16,15
13,14
1,28
9,10
26
23
24
27
21
11
12
18
17
2
5
6
7
8
3
4
XOUT, XIN — Connect to an external quartz crystal. Alternatively, an external clock can be sup-
plied to the XIN pin to provide the system clock for the device.
CPUCLK - Logic-level output from crystal oscillator. Can be used to clock an external CPU.
SCLK — Clocks serial data from the SDI pin and to the SDO pin when CS is low. SCLK is a
Schmitt-trigger input when MODE is low and a driven output when MODE is high.
SDO — Serial data output. Data is clocked out by SCLK.
CS — An input that enables the serial interface when MODE is low and a driven output when
MODE is high.
MODE — High selects external E
weak internal pull-down and therefore selects microcontroller mode if not connected.
E3, E1, E2 — Primarily active-low energy pulse outputs. These can be programmed to output
other conditions.
RESET — An active-low Schmitt-trigger input used to reset the chip.
INT — Active-low output, indicates that an enabled condition has occurred.
SDI — Serial data input. Data is clocked in by SCLK.
VIN+, VIN- — Differential analog inputs for the voltage channel.
IIN1+, IIN1-, IIN2+, IIN2- — Differential analog inputs for the current channels.
PFMON — Used to monitor the unregulated power supply via a resistive divider. If the PFMON
voltage drops below its low limit, the low-supply detect (LSD) bit is set in the Status register.
VREFOUT — The on-chip voltage reference output. Nominally 2.5 V, referenced to AGND.
VREFIN — The voltage reference input. Can be connected to VREFOUT or external 2.5 V refer-
ence.
VD+ — The positive digital supply.
DGND — Digital ground.
VA+ — The positive analog supply.
AGND — Analog ground.
NC — Factory use only. Connect to AGND.
VREFOUT
CPUCLK
VREFIN
TEST1
TEST2
MODE
DGND
XOUT
SCLK
VIN+
SDO
VD+
VIN-
CS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
2
PROM, Low selects external microcontroller. MODE includes a
XIN
SDI
E2
E1
INT
RESET
E3
PFMON
IIN1+
IIN1-
VA+
AGND
IIN2+
IIN2-
Differential Current Input
Differential Current Input
Crystal In
Serial Data Input
Energy Output 2
Energy Output 1
Interrupt
Reset
Energy Output 3
Power Fail Monitor
Differential Current Input
Differential Current Input
Positive Analog Supply
Analog Ground
CS5464
DS682F1

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