DM-COP8/20D National Semiconductor, DM-COP8/20D Datasheet - Page 27

• Manufacturer Part Number: DM-COP8/20D
• Description: CABLE FOR DEBUG MODULE 20-DIP
• Manufacturer: National Semiconductor

Specifications of DM-COP8/20D

• Accessory Type: 20-DIP Target Cable
• For Use With/related Products: MetaLink Debug Module
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DM-COP8/20D

1.7.4
The microcontroller uses the instruction cycle time as an internal timing reference. The
instruction cycle time is the amount of time it takes for an instruction to be fetched,
decoded, and executed. The instruction cycle time differs for various microcontrollers. It
also differs for various instructions. Microcontroller manufacturers specify a minimum
instruction cycle time. For example, for the COP8SAC7, the instruction cycle time t
1 S. This means that the fastest instructions are executed in 1 S with the
microcontroller operating at the maximum frequency. Slower instructions usually take
some multiple of the instruction cycle clock.
The instruction cycle time is usually a division of the input clock frequency to the
microcontroller. For example, divide by 10 is one possible factor. This means a 10 MHz
input clock must be provided to generate a 1 S instruction cycle time (1 MHz instruction
cycle clock). The minimum instruction cycle time may be several instruction cycle clocks
or only one instruction cycle clock, depending on the microcontroller. Limiting factors on
instruction cycle time are:
External Interrupt
Internal Interrupts
Software Traps
Maskable vs. Non-Maskable
Interrupts
1. Memory access time (memory speed)
2. Number of bytes per instruction
3. Width of data bus
4. Level of decoding required of instructions
5. Execution time
Timing
Interrupts which are generated by device/events
outside of the microcontroller. An external inter-
rupt can be latched or edge triggered.
Interrupts which are generated by hardware
within the microcontroller in response to certain
events, such as timer overflow or underflow.
Interrupts caused by executing a particular
instruction. Such an instruction may be a special
instruction designed to cause a trap (INTR) or may
be the result of an error in executing a normal
instruction.
Non-Maskable interrupts are those interrupts
which cannot be disabled by the software and
therefore cannot be ignored, such as the Reset and
Software Trap interrupts. Maskable interrupts, on
the other hand, may be disabled by the software,
such as timer overflow/underflow interrupts..
Enabling and disabling is generally accomplished
by setting/resetting an enable bit.
MICROCONTROLLER BASICS
1-15
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