TWR-MEM Freescale Semiconductor, TWR-MEM Datasheet - Page 7

MEMORY MODULE FOR TWR SYSTEM

TWR-MEM

Manufacturer Part Number
TWR-MEM
Description
MEMORY MODULE FOR TWR SYSTEM
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of TWR-MEM

Accessory Type
Memory Extension Card
Product
Microcontroller Modules
Data Bus Width
8 bit
Interface Type
JTAG, SPI
Flash
1 MB
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Freescale
Core Architecture
Coldfire
Core Sub-architecture
Coldfire V1, Coldfire V2, Coldfire V3
Silicon Core Number
MCF51, MCF52, MCF53
Rohs Compliant
Yes
For Use With/related Products
Freescale Tower System
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The default program for the CPLD connects a ColdFire Flexbus interface to the CompactFlash slot. This
implementation is very simple. However, other EBI protocols may require more advanced interface
logic. A portion of the default CPLD program code is shown in Figure 2 below.
The default CPLD code source and programmable image are available on the TWR-MEM tool support
page (start at http://www.freescale.com/tower).
The CPLD can be reprogrammed using a JTAG interface cable via the standard JTAG connector, J5. In
addition, J6 provides a means to connect GPIO signals from the Primary Elevator Connector to the
JTAG signals on the CPLD so that a host controller can “bit-bang” the JTAG protocol (see Altera’s
586: Porting the Jam STAPL and Jam STAPL Byte Code Players to an Embedded
Refer to
started guides, free development tools and application examples.
Altera’s Max II CPLD product website
// connect reset directly
assign cf_reset = ~reset;
// connect cf_we and flexbus rw_b
assign cf_we = rw_b;
// connect cs directly
assign cf_ce = cs;
// connect directly oe for (active - zero during read)
assign cf_oe = oe;
// connect first 11 addr bytes directly on output
assign cf_address = address[10:0];
// connect addr bit n.12 directly on reg cf pin
assign cf_reg = address[12];
// card detection
always @(cf_cd) begin
end
// addr n.13 is used for card detecting
assign data = (~cs & ~oe & address[13]) ? data_reg : 8'bz;
if (~cf_cd[0] & ~cf_cd[1]) begin
end else begin
end
data_reg = 8'b11100101;
data_reg = 8'b10101101;
Figure 2. Default CPLD Code Listing
TWR-MEM User’s Manual
for complete CPLD documentation including getting
// card is connected send (229 dec)
// card is not connected (173 dec)
System).
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