HSC-ADC-EVALCZ Analog Devices Inc, HSC-ADC-EVALCZ Datasheet - Page 2

• Manufacturer Part Number: HSC-ADC-EVALCZ
• Description: KIT EVAL ADC FIFO HI SPEED
• Manufacturer: Analog Devices Inc

Specifications of HSC-ADC-EVALCZ

• Design Resources: EVALC PC Board Gerber File
• Accessory Type: ADC Interface Board
• Silicon Manufacturer: Analog Devices
• Application Sub Type: ADC
• Kit Application Type: Data Converter
• Features: Buffer Memory Board For Capturing Digital Data, USB Port Interface, Windows 98, Windows 2000
• Kit Contents: ADC Analyzer, Buffer Memory Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Single ADC Version
• Lead Free Status / Rohs Status: Supplier Unconfirmed

HSC-ADC-EVALC
TABLE OF CONTENTS
Features .............................................................................................. 1
Equipment Needed........................................................................... 1
Product Highlights ........................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Product Description......................................................................... 3
Evaluation Board Description......................................................... 3
Evaluation Board Hardware ............................................................ 4
REVISION HISTORY
4/07—Revision 0: Initial Version
HSC-ADC-EVALC ADC Capture Board Easy Start ............... 4
Power Supplies .............................................................................. 4
Connection and Setup ................................................................. 4
Jumpers .......................................................................................... 5
HSC-ADC-EVALC ADC Capture Board Features.................. 6
HSC-ADC-EVALC Supported ADC Evaluation Boards........ 7
Rev. 0 | Page 2 of 32
Theory of Operation .........................................................................8
Evaluation Board Schematics and Artwork...................................9
Ordering Information.................................................................... 28
Configuration ................................................................................8
Input Circuitry...............................................................................8
Data Capture ..................................................................................8
Code Description ..........................................................................8
FPGA Configuration and Customization..................................8
HSC-ADC-EVALC Schematics...................................................9
PCB Layout ................................................................................. 23
I/O Connector—J1, J2, and J3 Pin Mapping .......................... 24
Bill of Materials (RoHS Compliant) ........................................ 28
Ordering Guide .......................................................................... 30
ESD Caution................................................................................ 30