HSC-ADC-EVALB-DCZ Analog Devices Inc, HSC-ADC-EVALB-DCZ Datasheet - Page 12

KIT EVAL ADC FIFO DUAL-CH USB HS

HSC-ADC-EVALB-DCZ

Manufacturer Part Number
HSC-ADC-EVALB-DCZ
Description
KIT EVAL ADC FIFO DUAL-CH USB HS
Manufacturer
Analog Devices Inc
Datasheet

Specifications of HSC-ADC-EVALB-DCZ

Design Resources
Very Low Jitter Encode (Sampling) Clocks for High Speed Analog-to-Digital Converters Using ADF4002 (CN0003)
Accessory Type
ADC Interface Board
Silicon Manufacturer
Analog Devices
Application Sub Type
ADC
Kit Application Type
Data Converter
Features
Buffer Memory Board For Capturing Digital Data, USB Port Interface, Windows 98, Windows 2000
Kit Contents
ADC Analyzer, Buffer Memory Board
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
Dual ADC Version
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC
Jumper #
J406
J503
J504
J505
J506
J602
J603
1
Some jumpers can be a 0 Ω resistor instead of a physical jumper. This is shown in Table 5 in the jumper description column.
Single Channel
Settings, Default
(Bottom)
In
In
Out
In
Out
Out
In
Demultiplexed
Settings
In
In
Out
In
Out
Out
In
Dual-Channel
Settings
In
In
Out
In
Out
Out
In
Rev. 0 | Page 12 of 28
Single-Channel
Settings (Top)
In
In
Out
In
Out
Out
In
1
Description
WRT_CLK2 is used to create write enable signal
Connect enable empty flag of top FIFO (U101)
N/A
Connect enable full flag of top FIFO (U101)
N/A
N/A
N/A
for FIFOs, 0 Ω resistor (significant only for
interleave mode)
to USB MCU, 0 Ω resistor
to USB MCU, 0 Ω resistor

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