LTM4601EV#PBF Linear Technology, LTM4601EV#PBF Datasheet - Page 20

• Manufacturer Part Number: LTM4601EV#PBF
• Description: IC DC/DC UMODULE 12A 118-LGA
• Manufacturer: Linear Technology
• Series: µModuler
• Type: Point of Load (POL) Non-Isolatedr

Specifications of LTM4601EV#PBF

• Design Resources: LTM4601 Spice Model
• Output: 0.6 ~ 5 V
• Number Of Outputs: 1
• Power (watts): 60W
• Mounting Type: Surface Mount
• Voltage - Input: 4.5 ~ 20V
• Package / Case: 118-LGA
• 1st Output: 0.6 ~ 5 VDC @ 12A
• Size / Dimension: 0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
• Power (watts) - Rated: 60W
• Operating Temperature: -40°C ~ 85°C
• Efficiency: 95%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -

LTM4601/LTM4601-1
Layout Checklist/Example
The high integration of LTM4601 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path, in-
• Place high frequency ceramic input and output capaci-
• Place a dedicated power ground layer underneath the
APPLICATIONS INFORMATION
20
cluding V
PCB conduction loss and thermal stress.
tors next to the V
high frequency noise.
unit. Refer frequency synchronization source to power
ground.
IN
, PGND and V
IN
, PGND and V
OUT
. It helps to minimize the
V
GND
V
OUT
IN
OUT
C
OUT
pins to minimize
C
IN
C
Figure 15. Recommended Layout
OUT
C
IN
• To minimize the via conduction loss and reduce module
• Do not put vias directly on pads.
• Use a separated SGND ground copper area for com-
Figure 15 gives a good example of the recommended
layout.
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
4601 F15
SIGNAL
GND
4601fb