HCMS-3902 Avago Technologies US Inc., HCMS-3902 Datasheet - Page 9
![LED DISPLAY 5X7 4CHAR 3.8MM RED](/photos/22/51/225179/4734722_sml.jpg)
HCMS-3902
Manufacturer Part Number
HCMS-3902
Description
LED DISPLAY 5X7 4CHAR 3.8MM RED
Manufacturer
Avago Technologies US Inc.
Series
HCMS-39xxr
Datasheet
1.HCMS-3902.pdf
(18 pages)
Specifications of HCMS-3902
Millicandela Rating
*
Internal Connection
*
Size / Dimension
*
Color
Red
Configuration
*
Voltage - Forward (vf) Typ
*
Package / Case
12-DIP
Display Type
Alphanumeric
Number Of Digits/alpha
4
Digit/alpha Size
0.15" (3.8mm)
Character Format
Dot Matrix
Character Size
3.81mm
Led Color
Red
Luminous Intensity
128µcd
No. Of Digits / Alpha
4
Display Area Width
17.78mm
Display Area Height
10.16mm
Number Of Digits
4
Illumination Color
Red
Wavelength
641 nm
Operating Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Common Pin
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCMS-3902
Manufacturer:
HITTITE
Quantity:
5 000
SIMULTANEOUS)
Figure 5. HCMS-39XX write cycle timing diagram
Pixel Map
In a 4-character display, the 160-bits are arranged as 20
columns by 8 rows. This array can be conceptualized as
four 5 x 8 dot matrix character locations, but only 7 of
the 8 rows have LEDs (see Figures 6 & 7). The bottom
row (row 0) is not used. Thus, latch location 0 is never
displayed. Column 0 controls the left-most column.
Data from Dot Latch locations 0-7 determine whether
or not pixels in Column 0 are turned-on or turned-off.
Therefore, the lower left pixel is turned-on when a logic
high is stored in Dot Latch location 1. Characters are
loaded in serially, with the left-most character being
loaded first and the right-most character being loaded
last. By loading one character at a time and latching
the data before loading the next character, the figures
will appear to scroll from right to left.
9
D
LED OUTPUTS,
OUT
REGISTERS
CONTROL
(SERIAL)
D
CLK
OUT
D
RS
CE
IN
NOTE:
1. DATA IS COPIED TO THE CONTROL REGISTER OR THE DOT LATCH AND LED OUTPUTS WHEN CE IS HIGH AND CLK IS LOW.
T
CLKCE
T
3
RSS
1
T
T
CEDO
RSH
10
2
T
CES
4
T
9
DOUTP
T
DS
6
T
T
DOUT
DH
7
8
T
CLKH
11
PREVIOUS DATA
T
CLKL
12
T
CEH
5
NEW DATA LATCHED HERE
NEW DATA
[1]