20-101-0303 Rabbit Semiconductor, 20-101-0303 Datasheet - Page 49

• Manufacturer Part Number: 20-101-0303
• Description: SMARTSCREEN OP7100 W/TOUCHSCREEN
• Manufacturer: Rabbit Semiconductor

Specifications of 20-101-0303

• Display Type: STN - Super-Twisted Nematic
• Viewing Area: 121.00mm L x 91.00mm W
• Backlight: CCFL - White
• Dot Pitch: 0.36mm x 0.36mm
• Dot Pixels: 320 x 240 (QVGA)
• Interface: Serial
• Product: Prototyping Accessories
• Processor Type: Z180
• Sram: 128 KB
• Flash: 512 KB
• Number Of I/os: 16
• Backup Battery: 3 V Lithium Coin Type
• Operating Voltage: 10 V to 30 V
• Power Consumption: 4.5 W
• Interface Type: Ethernet
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Display Mode: -
• Dot Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 20-101-0303; 20-101-303; 20-101-303; 316-1175

The prescaler (PS), the divide ratio (DR), and the SS bits form a baud-rate
generator, as shown in Figure 3-23.
DR (Divide Ratio)
This bit controls one stage of frequency division in the baud-rate generator.
If 1 then divide by 64. If 0 then divide by 16. This is the only control bit
that affects the external clock frequency.
PEO (Parity Even/Odd)
This bit affects parity: 0 ⇒ even parity, 1 ⇒ odd parity. It is effective only
if MOD1 is set in CNTLA (parity enabled).
/CTS/PS (Clear to Send/Prescaler)
When read, this bit gives the state of external pin
1 ⇒ high. When
characters are ignored. When written, this bit has an entirely different
function. If a 0 is written, the baud-rate prescaler is set to divide by 10. If a
1 is written, it is set to divide by 30.
MP (Multiprocessor Mode)
When this bit is set to 1, the multiprocessor mode is enabled. The multi-
processor bit (MPB) is included in transmitted data as shown here.
The MPB is 1 when MPBT is 1 and 0 when MPBT is 0.
MPBT (Multiprocessor Bit Transmit)
This bit controls the multiprocessor bit (MPB). When MPB is 1, transmit-
ted bytes will get the attention of other units listening only for bytes with
MPB set.
OP7100
Processor
Clock
start bit, data bits, MPB, stop bits
Prescaler
(
÷10
or
÷30
PS
/CTS
)
Figure 3-23. Z180 Baud-Rate Generator
is high, RDRF is inhibited so that incoming receive
Divider
1
2
...
64
External
Clock
/CTS
: 0 ⇒ low,
Divide
Ratio
(
16
or
64
DR
)
Hardware 49