MT4HTF6464AY-667E1 Micron Technology Inc, MT4HTF6464AY-667E1 Datasheet - Page 10

MODULE DDR2 512MB 240-UDIMM

MT4HTF6464AY-667E1

Manufacturer Part Number
MT4HTF6464AY-667E1
Description
MODULE DDR2 512MB 240-UDIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT4HTF6464AY-667E1

Memory Type
DDR2 SDRAM
Memory Size
512MB
Speed
667MT/s
Package / Case
240-DIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240UDIMM
Device Core Size
64b
Organization
64Mx64
Total Density
512MByte
Chip Density
1Gb
Access Time (max)
45ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
880mA
Number Of Elements
4
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1351
I
Table 10: DDR2 I
Values shown for MT47H16M16 DDR2 SDRAM only and are computed from values specified in the 256Mb (16 Meg x 16)
component data sheet
PDF: 09005aef80ed6fda
htf4c16_32_64x64ay – Rev. H 3/10 EN
Parameter
Operating one bank active-precharge current:
(I
mands; Address bus inputs are switching; Data bus inputs are switching
Operating one bank active-read-precharge current: I
4, CL = CL (I
t
dress bus inputs are switching; Data pattern is same as I
Precharge power-down current: All device banks idle;
CKE is LOW; Other control and address bus inputs are stable; Data bus in-
puts are floating
Precharge quiet standby current: All device banks idle;
CKE is HIGH, S# is HIGH; Other control and address bus inputs are stable;
Data bus inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching; Data
bus inputs are switching
Active power-down current: All device banks open;
t
are stable; Data bus inputs are floating
Active standby current: All device banks open;
t
mands; Other control and address bus inputs are switching; Data bus inputs
are switching
Operating burst write current: All device banks open; Continuous burst
writes; BL = 4, CL = CL (I
t
bus inputs are switching; Data bus inputs are switching
Operating burst read current: All device banks open; Continuous burst
read, I
MAX (I
Address bus inputs are switching; Data bus inputs are switching
Burst refresh current:
(I
trol and address bus inputs are switching; Data bus inputs are switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and ad-
dress bus inputs are floating; Data bus inputs are floating
DD
RCD =
CK (I
RAS MAX (I
RP =
DD
DD
),
) interval; CKE is HIGH, S# is HIGH between valid commands; Other con-
DD
Specifications
t
t
RAS =
RP (I
OUT
DD
t
); CKE is LOW; Other control and address bus inputs
RCD (I
),
= 0mA; BL = 4, CL = CL (I
DD
t
DD
RP =
DD
t
); CKE is HIGH, S# is HIGH between valid commands; Address
RAS MIN (I
), AL = 0;
DD
),
); CKE is HIGH, S# is HIGH between valid commands; Ad-
t
t
RP =
RP (I
DD
DD
t
RP (I
Specifications and Conditions – 128MB
t
DD
DD
CK =
t
); CKE is HIGH, S# is HIGH between valid commands;
CK =
), AL = 0;
); CKE is HIGH, S# is HIGH between valid com-
DD
t
); CKE is HIGH, S# is HIGH between valid com-
CK (I
t
CK (I
128MB, 256MB, 512MB (x64, SR) 240-Pin DDR2 SDRAM UDIMM
DD
DD
DD
t
CK =
),
), AL = 0;
); REFRESH command at every
t
RC =
t
CK (I
t
RC (I
t
DD
CK =
),
DD
t
CK =
t
t
RAS =
CK =
),
t
t
CK (I
CK =
t
RAS =
t
DD4W
CK =
t
CK (I
t
DD
CK (I
t
OUT
t
CK =
t
RAS MAX (I
t
CK (I
CK =
),
10
t
DD
RAS MIN (I
t
= 0mA; BL =
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
DD
RAS =
),
t
DD
CK (I
),
t
t
CK (I
); CKE is
RAS =
t
RC =
t
RFC
t
DD
RAS
DD
DD
Micron Technology, Inc. reserves the right to change products or specifications without notice.
);
t
DD
),
);
RC
),
Symbol
I
I
I
I
I
I
I
DD4W
DD2Q
I
I
DD2N
DD3N
DD4R
I
I
DD2P
DD3P
DD0
DD1
DD5
DD6
-667
360
400
200
160
120
220
860
760
720
20
24
20
© 2003 Micron Technology, Inc. All rights reserved.
I
DD
-53E
320
360
140
140
100
160
720
640
680
20
24
20
Specifications
-40E
300
340
100
120
120
560
480
660
20
80
24
20
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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