MT36HTS51272FY-667A3D3 Micron Technology Inc, MT36HTS51272FY-667A3D3 Datasheet - Page 23

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MT36HTS51272FY-667A3D3

Manufacturer Part Number
MT36HTS51272FY-667A3D3
Description
MODULE DDR2 4GB 240FBDIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT36HTS51272FY-667A3D3

Memory Type
DDR2 SDRAM
Memory Size
4GB
Speed
667MT/s
Package / Case
240-FBDIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240FBDIMM
Device Core Size
72b
Organization
512Mx72
Total Density
4GByte
Chip Density
1Gb
Package Type
FBDIMM
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Number Of Elements
36
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Differential Transmitter and Receiver Specifications
Table 12:
PDF: 09005aef822148b0/source: 09005aef82214898
HTS36C512x72F_2.fm - Rev. A 4/06 EN
Parameter
Differential peak-to-peak output voltage
for large voltage swing
Differential peak-to-peak output voltage
for regular voltage swing
Differential peak-to-peak output voltage
for small voltage swing
DC common code output voltage for large
voltage swing
DC common code output voltage for small
voltage swing
De-emphasized differential output
voltage ratio for –3.5dB de-emphasis
De-emphasized differential output
voltage ratio for –6.0dB de-emphasis
AC peak-to-peak common mode output
voltage for large swing
AC peak-to-peak common mode output
voltage for regular swing
AC peak-to-peak common mode output
voltage for small swing
MAX single-ended voltage in EI condition
DC + AC
MAX single-ended voltage in EI condition
DC + AC
MAX peak-to-peak differential voltage in
EI condition
Single-ended voltage (referenced to V
on D+/D–
MIN TX eye width, 3.2 and 4.0 Gb/s
MIN TX eye width 4.8 Gb/s
MAX TX deterministic jitter, 3.2 and 4.8
Gb/s
MAX TX deterministic jitter, 4.8 Gb/s
Instantaneous pulse width
Differential TX output rise/fall time
Mismatch between rise and fall times
Differential return loss
Common mode return loss
Transmitter termination impender
D+/D– TX Impedance difference
Lane-to-lane skew at TX
Lane-to-lane skew at TX
Differential Transmitter Output Specifications
SS
)
V
V
T
T
V
V
V
V
T
V
V
V
V
TX
R
T
TX
TX
TX
T
TX
TX
TX
TX
TX
V
L
L
Symbol
TX
TX
TX
TX
TX
TX
TX
T
V
V
T
-
RL
-
-
-
RL
-
-
RISE
TX
TX
-
-
RF
DE
DE
TX
-
TX
CM
IDLE
V
TX
-
CM
CM
-
-
-
-
TX
TX
-
EYE
-Eye-MIN
Differential Transmitter and Receiver Specifications
DIFF
MATCH
DIFF
DIFF
IDLE
DJ
-
R
-
-
TX
-3.5-Ratio
-6.0-Ratio
-
TX
TX
-
MISMATCH
SKEW
SKEW
-
-
IDLE
-
-
-
-
DJ
-
TX
CM
CM
PULSE
AC
-
T
AC
AC
-
DD
-
-
MIN
-
DIFF
p-p_L
p-p_R
p-p_S
DIFF
-
SE
-
TX
CM
SE
DD
p-p-R
_
_
p-p-L
p-p-S
-
-4.8
SE
L
S
-
-
-
240-Pin 4GB DDR2 SDRAM FBDIMM (DR, FB, x72)
1
2
4.8
p-p
FALL
DC
DC
23
Min
–3.0
–5.0
TBD
0.85
900
800
520
135
–75
0.7
30
41
8
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
100 + 3UI
100 = 2UI
1,300
Max
–4.0
–7.0
TBD
375
280
750
0.2
90
80
70
50
20
40
90
20
55
4
Unit
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
dB
dB
dB
dB
UI
UI
UI
UI
UI
ps
ps
%
ps
ps
Ω
EQ 4; Boundaries are applied
Meas. 0.1–2.4 GHz, Note 11
Meas. 0.1–2.4 GHz, Note 11
separately to high and low
©2006 Micron Technology, Inc. All rights reserved.
20–80% voltage, Note 1
output voltage states
Comments, Notes
EQ 2, Note 1, 2
EQ 7, Note 1, 5
EQ 7, Note 1, 5
EQ 7, Note 1, 5
EQ 1, Note 1
EQ 1, Note 1
EQ 1, Note 1
EQ 2, Note 1
Note 1, 3, 4
Note 1, 3, 4
Note 1, 8, 9
Note 1, 8, 9
Note 13, 15
Note 14, 15
Note 1, 7
Note 1, 8
Note 1, 8
Note 10
Note 6
Note 6
12
Preliminary

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