MT9VDDT6472PHG-335F2 Micron Technology Inc, MT9VDDT6472PHG-335F2 Datasheet - Page 31

• Manufacturer Part Number: MT9VDDT6472PHG-335F2
• Description: MODULE DDR SDRAM 512MB 200SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT9VDDT6472PHG-335F2

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 512Mb
• Access Time (max): 700ps
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.4A
• Number Of Elements: 9
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 24: Serial Presence- Detect Matrix – 1GB
“1”/”0”: Serial Data, “driven to HIGH”/”driven to LOW”
pdf: 09005aef808ffe58, source: 09005aef808ffdc7
DD9C16_32_64_128x72PHG.fm - Rev. B 9/04 EN
BYTE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
1
2
3
4
5
6
7
8
9
Number of SPD Bytes Used by Micron
Total Number of Bytes in SPD Device
Fundamental Memory Type
Number of Row Addresses on Assembly
Number of Column Addresses on Assembly
Number of Physical Ranks on DIMM
Module Data Width
Module Data Width (Continued)
Module Voltage Interface Levels
SDRAM Cycle Time,
(see note 2)
SDRAM Access from Clock,
(see note 1)
Module Configuration Type
Refresh Rate/ Type
SDRAM Device Width (Primary DDR SDRAM)
Error-checking DDR SDRAM Data Width
Minimum Clock Delay, Back-to-Back Random Column
Access
Burst Lengths Supported
Number of Banks on DDR SDRAM Device
CAS Latencies Supported
CS Latency
WE Latency
SDRAM Module Attributes
SDRAM Device Attributes: General
SDRAM Cycle Time,
(see note 2)
SDRAM Access from CK,
(see note 2)
SDRAM Cycle Time,
SDRAM Access from CK,
Minimum Row Precharge Time,
Minimum Row Active to Row Active,
Minimum RAS# to CAS# Delay,
Minimum RAS# Pulse Width,
Module Rank Density
t
t
t
DESCRIPTION
CK (CAS Latency = 2.5)
CK (CAS Latency = 2)
CK (CAS Latency = 1.5)
t
AC (CAS Latency = 1.5)
t
AC (CAS Latency = 2)
t
AC (CAS Latency = 2.5)
t
RAS (see note 3)
128MB, 256MB, 512MB, 1GB (x72, ECC, PLL, SR)
t
RCD (see note 5)
t
RP (see note 5)
t
RRD
31
Unbuffered, Diff CLK, PLL
0.75ns (-262/-26A/-265)
0.75ns (-262/-26A/-265)
200-PIN DDR SDRAM SODIMM
7.5ns (-335/-26A/-262)
45ns (-262/-26A/-265)
15ns (-262/-26A/-265)
Fast/concurrent AP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ENTRY(VERSION)
20ns (-265/-26A)
20ns (-26A/-265)
7ns (-262/-26A)
SDRAM DDR
7.5ns (-265)
0.7ns (-335)
0.7ns (-335)
10ns (-265)
18ns (-335)
15ns (-262)
12ns (-335)
18ns (-335)
15ns (-262)
42ns (-335)
7.8µs/SELF
6ns (-335)
SSTL 2.5V
1 clock
2, 4, 8
1GB
ECC
128
256
N/A
N/A
2.5
14
11
72
x8
x8
2
0
4
0
1
©2004 Micron Technology, Inc. All rights reserved.
MT9VDDT12872PH
0B
0C
C0
A0
3C
3C
3C
2A
2D
80
08
07
0E
01
48
00
04
60
70
75
70
75
02
82
08
08
01
0E
04
01
02
24
75
70
75
00
00
48
50
30
48
50
01
ADVANCE