MT9VDDT6472HY-335D2 Micron Technology Inc, MT9VDDT6472HY-335D2 Datasheet - Page 10

• Manufacturer Part Number: MT9VDDT6472HY-335D2
• Description: MODULE SDRAM DDR 512MB 184DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT9VDDT6472HY-335D2

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 512Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.575A
• Number Of Elements: 9
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I
Table 10:
PDF: 09005aef80804052/Source: 09005aef806e057b
DD9C16_32_64x72H.fm - Rev. E 1/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
changing once per clock cycle; Address and control inputs
changing once every two clock cycles
Operating one bank active-read-precharge current:
BL = 4;
and control inputs changing once per clock cycle
Precharge power-down standby current: All device banks
idle; Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; V
Active power-down standby current: One device bank
active; Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One
device bank active;
DM, and DQS inputs changing twice per clock cycle; Address
and other control inputs changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst
reads; One device bank active; Address and control inputs
changing once per clock cycle;
Operating burst write current: BL = 2; Continuous burst
writes; One device bank active; Address and control inputs
changing once per clock cycle;
DQS inputs changing twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads (BL = 4) with auto precharge;
(MIN);
only during active READ or WRITE commands
DD
RC =
CK =
Specifications
t
t
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control inputs
t
t
CK =
RC =
t
t
CK (MIN); Address and control inputs change
I
Values are shown for the MT46V16M8 DDR SDRAM only and are computed from values specified in the
128Mb (16 Meg x 8) component data sheet
RC (MIN);
DD
t
CK =
Specifications and Conditions – 128MB
t
RC =
t
CK (MIN); DQ, DM, and DQS inputs
t
CK =
t
t
CK =
RAS (MAX);
t
CK =
128MB, 256MB, 512MB (x72, ECC, SR) 200-Pin DDR SDRAM SODIMM
t
CK (MIN); I
t
t
t
IN
CK =
CK =
CK (MIN); CKE = LOW
t
= V
CK (MIN); CKE = LOW
REF
t
t
CK (MIN); I
CK (MIN); DQ, DM, and
t
CK =
for DQ, DM, and DQS
OUT
t
t
(MIN)
t
CK (MIN); DQ,
REFC =
REFC = 15.625µs
= 0mA; Address
OUT
t
RC =
t
= 0mA
RFC
t
RC
10
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
DD
4W
3N
5A
2P
3P
4R
2F
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
1
5
6
7
1,125
1,215
1,260
1,260
2,385
3,195
-335
405
225
450
27
45
27
Electrical Specifications
1,080
1,170
1,125
1,980
2,970
-262
990
405
225
450
27
45
27
©2004 Micron Technology, Inc. All rights reserved
-26A/
1,080
1,125
1,080
1,980
2,925
-265
945
360
180
405
27
45
18
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA