MT8VDDT3264AG-262G4 Micron Technology Inc, MT8VDDT3264AG-262G4 Datasheet - Page 17
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MT8VDDT3264AG-262G4
Manufacturer Part Number
MT8VDDT3264AG-262G4
Description
MODULE SDRAM DDR 256MB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT8VDDT3264AG-335G6.pdf
(30 pages)
Specifications of MT8VDDT3264AG-262G4
Memory Type
DDR SDRAM
Memory Size
256MB
Speed
266MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 16: DDR SDRAM Component Electrical Characteristics and Recommended AC
Notes: 1–5, 12–15, 29, 49
pdf: 09005aef80867ab3, source: 09005aef80867a99
DD8C16_32_64x64AG.fm - Rev. G 9/04 EN
Access window of DQs from CK/CK#
CK high-level width
CK low-level width
Clock cycle time
DQ and DM input hold time relative to DQS
DQ and DM input setup time relative to DQS
DQ and DM input pulse width (for each
input)
Access window of DQS from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS-DQ skew, DQS to last DQ valid, per
group, per access
Write command to first DQS latching
transition
DQS falling edge to CK rising - setup time
DQS falling edge from CK rising - hold time
Half clock period
Data-outhigh-impedancewindowfromCK/
CK#
Data-outlow-impedancewindowfromCK/CK#
Address and control input hold time (fast
slew rate)
Address and control input setup time (fast
slew rate)
Address and control input hold time (slow
slew rate)
Address and control input setup time (slow
slew rate)
Address and Control input pulse width (for
each input)
LOAD MODE REGISTER command cycle time
DQ-DQS hold, DQS to first DQ to go non-
valid, per access
Data hold skew factor
ACTIVE to PRECHARGE command
ACTIVE to READ with auto precharge
command
ACTIVEto ACTIVE/AUTO REFRESH command
period
AUTO REFRESH command period
ACTIVE to READ or WRITE delay
PRECHARGE command period
Operating Conditions
AC CHARACTERISTICS
PARAMETER
;
notes appear on pages 19–22; 0°C ≤ T
CL = 2.5
CL = 2
t
CK (2.5)
t
t
t
t
t
t
t
DQSCK
t
CK (2)
DQSQ
SYM
DQSH
DIPW
DQSL
DQSS
t
t
t
t
t
t
t
MRD
t
t
t
t
t
QHS
t
t
DSH
t
t
RAP
RCD
t
t
DSS
t
t
IPW
RAS
t
RFC
t
t
QH
DH
IH
IH
AC
CH
DS
HP
HZ
RC
CL
IS
IS
RP
LZ
F
S
F
S
-0.70
-0.60
-0.70
t
MIN
t
0.45
0.45
0.45
0.45
1.75
0.35
0.35
0.75
0.75
0.75
0.80
0.80
QHS
HP -
7.5
0.2
0.2
2.2
12
42
15
60
72
15
15
6
t
17
CH,
-335
A
t
≤ +70°C; V
70,000
128MB, 256MB, 512MB (x64, SR)
+0.70
+0.60
+0.70
MAX
CL
0.55
0.55
0.45
1.25
0.55
12
12
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
7.5/10
-0.75
-0.75
-0.75
t
t
MIN
0.45
0.45
1.75
0.35
0.35
0.75
0.90
0.90
QHS
HP -
7.5
0.5
0.5
0.2
0.2
2.2
DD
15
40
15
60
75
15
15
1
1
t
CH,
-262
= V
120,000
t
DD
+0.75
+0.75
+0.75
MAX
CL
0.55
0.55
1.25
0.75
0.5
13
13
Q = +2.5V ±0.2V
7.5/10
t
-0.75
-0.75
-0.75
t
MIN
0.45
0.45
1.75
0.35
0.35
0.75
0.90
0.90
QHS
HP -
7.5
0.5
0.5
0.2
0.2
2.2
15
40
65
75
20
20
-26A/-265
20
1
1
t
CH,
120,000
t
+0.75
+0.75
MAX
+0.75
CL
0.55
0.55
1.25
0.75
0.5
13
13
UNITS
©2004 Micron Technology. Inc.
t
t
t
t
t
t
t
ns
CK
CK
ns
ns
ns
ns
ns
ns
CK
CK
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
40, 46
40, 46
23, 27
23, 27
22, 23
16, 37
16, 37
22, 23
31, 49
26
26
30
12
12
12
12
44
27