MT36VDDT51272G-265A2 Micron Technology Inc, MT36VDDT51272G-265A2 Datasheet - Page 13

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MT36VDDT51272G-265A2

Manufacturer Part Number
MT36VDDT51272G-265A2
Description
MODULE SDRAM DDR 4GB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT36VDDT51272G-265A2

Memory Type
DDR SDRAM
Memory Size
4GB
Speed
266MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 12:
PDF: 09005aef809d5451/Source: 09005aef807da325
dd36c128_256_512x72.fm - Rev. F 6/08 EN
Parameter/Condition
Operating one bank active-precharge current:
(MIN); DQ, DM, and DQS inputs changing once per clock cycle; Address and
control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
clock cycle
Precharge power-down standby current: All device banks idle; Power-down
mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle;
V
Active power-down standby current: One device bank active; Power-down
mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active
t
clock cycle; Address and other control inputs changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One device
bank active; Address and control inputs changing once per clock cycle;
t
Operating burst write current: BL = 2; Continuous burst writes; One device
bank active; Address and control inputs changing once per clock cycle;
t
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving
reads (BL = 4) with auto precharge;
and control inputs change only during active READ or WRITE commands
CK =
RC =
CK =
CK =
IN
= V
t
t
t
t
CK (MIN); I
RAS (MAX);
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
REF
t
t
CK =
CK =
for DQ, DM, and DQS
t
t
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
I
Values are for the MT46V256M4 DDR SDRAM only and are computed from values specified in the
1Gb (256 Meg x 4) component data sheet
DD
OUT
OUT
Specifications and Conditions – 4GB
t
Notes:
CK =
= 0mA; Address and control inputs changing once per
= 0mA
t
CK (MIN); DQ, DM, and DQS inputs changing twice per
1. Value calculated as one module rank in this operating condition; all other module ranks in
2. Value calculated reflects all module ranks in this operating condition.
I
DD
2P (CKE LOW) mode.
t
RC =
t
RC (MIN);
t
RC =
t
1GB, 2GB, 4GB (x72, ECC, DR) 184-Pin DDR RDIMM
CK =
t
t
t
RC (MIN);
REFC =
REFC = 7.8125µs
t
t
CK =
CK (MIN); Address
13
t
t
RC =
CK (MIN);
t
RFC (MIN)
t
CK =
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
RC (MIN);
t
CK
;
Symbol
I
I
I
I
I
I
I
DD
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
4W
3N
5A
4R
2P
2F
3P
0
1
5
6
7
1
1
2
2
1
Electrical Specifications
2
2
2
1
2
2
1
©2003 Micron Technology, Inc. All rights reserved
12,240
3,060
3,690
2,340
1,260
1,800
4,140
4,320
9,630
-335
360
360
324
11,880
-26A/
2,790
3,420
2,160
1,080
1,620
3,780
3,960
8,910
-265
360
360
324
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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