MT18VDDT6472AG-335G4 Micron Technology Inc, MT18VDDT6472AG-335G4 Datasheet - Page 11

• Manufacturer Part Number: MT18VDDT6472AG-335G4
• Description: MODULE SDRAM DDR 512MB 184DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT18VDDT6472AG-335G4

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 184UDIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 256Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.611A
• Number Of Elements: 18
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 184
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

reset the DLL, it should always be followed by a LOAD
MODE REGISTER command to select normal operat-
ing mode.
(256MB); A7–A12 (512MB, 1GB); or A7–A13 (2GB) are
reserved for future use and/or test modes. Test modes
and reserved states should not be used because
unknown operation or incompatibility with future ver-
sions may result.
Extended Mode Register
beyond those controlled by the mode register; these
additional functions are DLL enable/disable and out-
put drive strength. These functions are controlled via
the bits shown in Figure 7, Extended Mode Register
Definition Diagram. The extended mode register is
programmed via the LOAD MODE REGISTER com-
mand to the mode register (with BA0 = 1 and BA1 = 0)
and will retain the stored information until it is pro-
grammed again or the device loses power.
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0/BA1 both LOW) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles must occur before a READ command
can be issued.
pdf: 09005aef808a331f, source: 09005aef80858037
DD18C32_64_128_256x72G.fm - Rev. E 9/04 EN
All other combinations of values for A7–A11
The extended mode register controls functions
The extended mode register must be loaded when
The DLL must be enabled for normal operation.
256MB, 512MB, 1GB, 2GB (x72, ECC, SR)
The
11
NOTE:
256MB Module
512MB and 1GB Modules
2GB Module
E13
1. BA1 and BA0 (E13 and E12 for 256MB; E14 and E13 for
2. QFC# is not supported.
0
0
–
15
BA1 BA0
1
512MB, 1GB; or E15 and E14 for 2GB) must be “0, 1” to
select the Extended Mode Register (vs. the base Mode
Register).
Figure 7: Extended Mode Register
E12
0 1
1
14
BA1 BA0
0
–
14
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0 1
1 1
184-PIN DDR SDRAM RDIMM
13
E11
BA1 BA0
13
13
A13
0
–
1 1
12
12
E10
A12
12
A12
0
–
11
11
A11
A11
11
E9
A11
0
–
Definition Diagram
10
10
E8
A10
A10
10
0
–
A10
Operating Mode
Operating Mode
E7
9
9
0
–
A9
A9
9
A9
Operating Mode
E6 E5
0
–
8
8
A8
A8
8
A8
0
–
7
7
7
A7 A6 A5 A4 A3
A7 A6 A5 A4 A3
A7 A6 A5 A4 A3
E4
0
–
6
6
6
E3
0
–
5
5
5
©2004 Micron Technology, Inc. All rights reserved.
E2
0
–
4
4
4
3
3
3
E1,
Valid
–
2
2
E0
A2 A1 A0
A2 A1 A0
2
A2 A1 A0
DS
DS
DS
1
1
1
DLL
DLL
E1
0
DLL
0
0
Operating Mode
Reserved
Reserved
0
E0
0
1
Extended Mode
Register (Ex)
Extended Mode
Register (Ex)
Drive Strength
Extended Mode
Register (Ex)
Address Bus
Address Bus
Address Bus
Normal
Disable
Enable
DLL