MT18VDDF12872HG-40BF1 Micron Technology Inc, MT18VDDF12872HG-40BF1 Datasheet - Page 10

• Manufacturer Part Number: MT18VDDF12872HG-40BF1
• Description: MODULE DDR SDRAM 1GB 200-SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT18VDDF12872HG-40BF1

• Memory Type: DDR SDRAM
• Memory Size: 1GB
• Speed: 400MT/s
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 72b
• Organization: 128Mx72
• Total Density: 1GByte
• Chip Density: 512Mb
• Access Time (max): 700ps
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 2.6V
• Operating Current: 1.8A
• Number Of Elements: 18
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Extended Mode Register
beyond those controlled by the mode register; these
additional functions are DLL enable/disable and out-
put drive strength. These functions are controlled via
the bits shown in Figure 6, Extended Mode Register
Definition Diagram, on page 10. The extended mode
register is programmed via the LOAD MODE REGIS-
TER command to the mode register (with BA0 = 1 and
BA1 = 0) and will retain the stored information until it
is programmed again or the device loses power. The
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0/ BA1 both LOW) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either of
these requirements could result in unspecified opera-
tion.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
pdf: 09005aef80e4880c, source: 09005aef80e487d7
DDAF18C128x72HG.fm - Rev. A 10/04 EN
The extended mode register controls functions
The extended mode register must be loaded when
The DLL must be enabled for normal operation.
10
is enabled automatically.) Any time the DLL is enabled,
a DLL Reset and 200 clock cycles with CKE HIGH must
occur before a READ command can be issued.
NOTE:
1. BA1 and BA0 (E14 and E13) must be “0, 1” to select the
2. QFC# is not supported.
E12
0
0
14
–
BA1 BA0
1
Extended Mode Register (vs. the base Mode Register).
Figure 6: Extended Mode Register
E11
1
13
0
1
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
E10
12
A12
0
–
11
E9
1GB (x72, ECC, DR) PC3200
A11
0
–
E8
10
0
–
A10
Definition Diagram
Operating Mode
E7
0
–
9
A9
200-PIN DDR SODIMM
E6 E5
0
–
8
A8
0
–
7
A7 A6 A5 A4 A3
E4
0
–
6
E3
0
–
5
E2
0
–
4
3
E1,
Valid
–
E0
2
A2 A1 A0
DS
1
E1
©2004 Micron Technology, Inc.
0
DLL
Operating Mode
Reserved
Reserved
0
E0
0
1
Drive Strength
Extended Mode
Register (Ex)
Address Bus
Normal
Disable
Enable
DLL