MT5VDDT3272AG-40BF1 Micron Technology Inc, MT5VDDT3272AG-40BF1 Datasheet - Page 9

• Manufacturer Part Number: MT5VDDT3272AG-40BF1
• Description: MODULE DDR 256MB 184-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT5VDDT3272AG-40BF1

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 400MT/s
• Package / Case: 184-DIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 11:
PDF: 09005aef808143d9/Source: 09005aef806e1c40
DD5C8_16_32x72A.fm - Rev. F 10/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
cycle; Address and control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
inputs changing once per clock cycle
Precharge power-down standby current: All device banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; V
Active power-down standby current: One device bank active;
Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank
active;
changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per clock
cycle;
Operating burst write current: BL = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock
cycle;
clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads; BL = 4 with auto precharge;
t
READ or WRITE commands
CK =
RC =
CK =
CK =
t
t
t
t
t
t
RC (MIN);
CK (MIN); DQ, DM, and DQS inputs changing once per clock
CK (MIN); CKE = HIGH; Address and other control inputs
CK =
CK =
CK (MIN); Address and control inputs change only during active
t
RC =
t
t
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs changing twice per
t
RAS (MAX);
I
Values are shown for the MT46V16M16 DDR SDRAM only and are computed from values specified in the
256Mb (16 Meg x 16) component data sheet
DD
t
CK =
Specifications and Conditions – 128MB
t
t
CK =
CK =
t
CK (MIN); I
OUT
t
t
t
CK =
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
= 0mA
IN
t
CK (MIN); DQ, DM, and DQS inputs
64MB, 128MB, 256MB (x72, ECC, SR) 184-Pin DDR SDRAM UDIMM
= V
OUT
REF
= 0mA; Address and control
for DQ, DQS, and DM
t
RC =
t
t
REFC =
REFC = 7.8125µs
t
RC =
t
RC (MIN);
t
RC (MIN);
t
RFC (MIN)
9
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
I
I
I
DD
DD
DD
DD
DD
DD
DD
DD
4W
3N
5A
4R
2P
2F
3P
0
1
5
6
7
1,300
1,075
1,300
2,550
-40B
675
925
300
200
350
20
30
20
Electrical Specifications
1,100
1,275
2,200
-335
625
900
250
150
300
975
20
30
20
©2002 Micron Technology, Inc. All rights reserved.
1,175
1,900
-262
625
850
225
125
250
925
800
20
30
20
-26A/
1,175
1,900
-265
600
775
225
125
250
925
800
20
30
20
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA