MT4VDDT1664AG-40BF3 Micron Technology Inc, MT4VDDT1664AG-40BF3 Datasheet - Page 11

• Manufacturer Part Number: MT4VDDT1664AG-40BF3
• Description: MODULE DDR 128MB 184-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT4VDDT1664AG-40BF3

• Memory Type: DDR SDRAM
• Memory Size: 128MB
• Speed: 400MT/s
• Package / Case: 184-DIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 184UDIMM
• Device Core Size: 64b
• Organization: 16Mx64
• Total Density: 128MByte
• Chip Density: 256Mb
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 2.6V
• Operating Current: 1.04A
• Number Of Elements: 4
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 184
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Extended Mode Register
beyond those controlled by the mode register; these
additional functions are DLL enable/disable and out-
put drive strength. These functions are controlled via
the bits shown in Figure 7, Extended Mode Register
Definition Diagram, on page 11. The extended mode
register is programmed via the LOAD MODE REGIS-
TER command to the mode register (with BA0 = 1 and
BA1 = 0) and will retain the stored information until it
is programmed again or the device loses power. The
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0/BA1 both low) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles with CKE HIGH must occur before a
READ command can be issued.
pdf: 09005aef80a43556, source: 09005aef80a43534
DDA8C16_32_64x64AG.fm - Rev. D 9/04 EN
The extended mode register controls functions
The extended mode register must be loaded when
The DLL must be enabled for normal operation.
128MB, 256MB, 512MB (x64, SR) PC3200
11
NOTE:
128MB Module
1. BA1 and BA0 (E13 and E12 for 128MB, E14 and E13
2. QFC# is not supported.
256MB and 512MB Modules
E12
0
–
for 256MB and 512MB) must be “0, 1” to select the
Extended Mode Register (vs. the base Mode Regis-
ter).
Figure 7: Extended Mode Register
E11
0 1
14
BA1 BA0
0
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
0 1
1 1
E10
13
BA1 BA0
13
0
–
1 1
12
12
E9
A12
0
–
11
11
E8
A11
A11
0
–
Definition Diagram
E7
10
10
0
–
A10
A10
E6 E5
0
–
9
9
Operating Mode
A9
A9
Operating Mode
0
–
8
8
A8
A8
E4
0
–
7
7
A7 A6 A5 A4 A3
A7 A6 A5 A4 A3
E3
0
–
6
6
E2
0
–
5
5
2
4
4
E1,
Valid
–
3
3
E0
2
2
A2 A1 A0
A2 A1 A0
DS
DS
Operating Mode
Reserved
Reserved
1
1
©2004 Micron Technology. Inc.
E1
0
DLL
DLL
0
0
E0
0
1
Drive Strength
Extended Mode
Register (Ex)
Extended Mode
Register (Ex)
Address Bus
Address Bus
Normal
Disable
Enable
DLL