MT16VDDT6464AY-40BK1 Micron Technology Inc, MT16VDDT6464AY-40BK1 Datasheet - Page 14
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MT16VDDT6464AY-40BK1
Manufacturer Part Number
MT16VDDT6464AY-40BK1
Description
MODULE DDR 512MB 200MHZ 184-DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT16VDDT6464AY-335K1.pdf
(15 pages)
Specifications of MT16VDDT6464AY-40BK1
Memory Type
DDR SDRAM
Memory Size
512MB
Speed
400MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184UDIMM
Device Core Size
64b
Organization
64Mx64
Total Density
512MByte
Chip Density
256Mb
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
2.6V
Operating Current
1.632A
Number Of Elements
16
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial Presence-Detect
Table 14:
Table 15:
Serial Presence-Detect Data
PDF: 09005aef80739fa5/Source:09005aef807397e5
DD16C64_128_256x64A.fm - Rev. E 8/08 EN
Parameter/Condition
Supply voltage
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Output low voltage: I
Input leakage current: V
Output leakage current: V
Standby current: SCL = SDA = V
Power supply current: SCL clock frequency = 100 kHz
Parameter/Condition
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA fall time
SDA rise time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
Serial Presence-Detect EEPROM AC Operating Conditions
Notes:
OUT
IN
= 3mA
OUT
= GND to V
1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1 and
2. This parameter is sampled.
3. For a restart condition or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
For the latest serial presence-detect data, refer to Micron’s SPD page:
www.micron.com/SPD.
= GND to V
DD
the falling or rising edge of SDA.
sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the WRITE
cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-up resis-
tance, and the EEPROM does not respond to its slave address.
- 0.3V; All other inputs = V
DD
DD
512MB, 1GB, 2GB (x64, DR) 184-Pin DDR SDRAM UDIMM
14
SS
or V
DD
t
WRC) is the time from a valid stop condition of a write
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
Symbol
t
t
t
HD:DAT
SU:DAT
t
SU:STO
SU:STA
t
Symbol
t
t
H:STA
t
HIGH
V
LOW
f
WRC
t
t
BUF
SCL
AA
DH
t
t
DDSPD
t
V
R
V
F
I
I
V
I
I
I
LO
CC
SB
OL
LI
IH
IL
V
Min
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
DDSPD
0
–
–
–
–
–
Min
–1.0
2.3
–
–
–
–
–
Serial Presence-Detect
× 0.7 V
©2004 Micron Technology, Inc. All rights reserved
Max
300
300
400
0.9
50
10
–
–
–
–
–
–
–
–
–
V
DDSPD
DDSPD
Max
3.6
0.4
2.0
10
10
30
Units
kHz
ms
µs
µs
ns
ns
ns
µs
µs
µs
ns
µs
ns
µs
µs
+ 0.5
× 0.3
Notes
Units
mA
µA
µA
µA
V
V
V
V
1
2
2
3
4