TH58NS512DC-TO51(Y) Toshiba, TH58NS512DC-TO51(Y) Datasheet - Page 21

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TH58NS512DC-TO51(Y)

Manufacturer Part Number
TH58NS512DC-TO51(Y)
Description
IC E2PROM NAND 3.3V 512MB FDC22A
Manufacturer
Toshiba
Datasheet

Specifications of TH58NS512DC-TO51(Y)

Memory Size
64MB
Memory Type
EEPROM - Smart Media
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
TH58NS512DC-TO51Y
TH58NS512DCTO51Y
Auto Page Program
the address and data have been input. The sequence of command, address and data input is shown below. (Refer
to the detailed timing chart.)
Auto Block Erase
follows the Erase Setup command 60H. This two-cycle process for Erase operations acts as an extra layer of
protection from accidental erasure of data due to external noise. The device automatically executes the Erase
and Verify operations.
The device carries out an Automatic Page Program operation when it receives a 10H Program command after
The Auto Block Erase operation starts on the rising edge of WE after the Erase Start command D0H which
Data input
command
RY
RY
Data input
/
/
80
BY
BY
Selected
Figure 7. Auto Page Program operation
page
Address
60
Program
input
Block address
input: 3 cycles
Data input
0~527
Reading & verification
Erase Start
command
command
Program
D0
10
page on the rising edge of WE following input of the 10H command.
After programming, the programmed data is transferred back to the
register to be automatically verified by the device. If the programming
does not succeed, the Program/Verify operation is repeated by the
device until success is achieved or until the maximum loop number set in
the device is reached.
The data is transferred (programmed) from the register to the selected
Busy
completion of the operation.
RY
Status Read
Status Read
command
command
/
BY
70
70
automatically returns to Ready after
I/O
I/O
2000-08-27 21/33
Fail
Fail
TH58NS512DC
Pass
Pass

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