TC58V64ADC-T051 Toshiba, TC58V64ADC-T051 Datasheet - Page 30

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TC58V64ADC-T051

Manufacturer Part Number
TC58V64ADC-T051
Description
IC 64MBIT NAND SMART 3V 44TSOP
Manufacturer
Toshiba
Datasheet

Specifications of TC58V64ADC-T051

Memory Size
8MB
Memory Type
EEPROM - Smart Media
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
TC58V64DC-CT0501
TC58V64DC-CT0501
(12)
(13)
RY
/
WE
RE
I/O
BY
Second programming
Tenth programming
Several programming cycles on the same page (Partial Page Program)
Note regarding the RE signal
Therefore, once the device has been set to Read mode by a 00H, 01H or 50H command, the internal column
address counter is incremented by the RE clock independently of the address input timing. If the RE
clock input pulses start before the address input, and the pointer reaches the last column address, an
internal read operation (array → register) will occur and the device will enter Busy state. (Refer to Figure
25.)
First programming
A page can be divided into up to 10 segments. Each segment can be programmed individually as follows:
The internal column address counter is incremented synchronously with the RE clock in Read mode.
Hence the RE clock input must start after the address input.
00H/01H/50H
Result
Note: The input data for unprogrammed or previously programmed page segments must be 1
Data Pattern 1
Data Pattern 1
(i.e. the inputs for all page bytes outside the segment which is to be programmed should
All 1s
be set to all 1).
Data Pattern 2
Data Pattern 2
All 1s
Figure 24.
Figure 25.
All 1s
Address input
All 1s
Data Pattern 10
Data Pattern 10
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TC58V64ADC

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