DS1921H-F5# Maxim Integrated Products, DS1921H-F5# Datasheet - Page 5

IBUTTON THERMOCHRON F5

DS1921H-F5#

Manufacturer Part Number
DS1921H-F5#
Description
IBUTTON THERMOCHRON F5
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1921H-F5#

Rohs Information
IButton RoHS Compliance Plan
Memory Size
512B
Memory Type
NVSRAM (Non-Volatile SRAM)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1-Wire CRC GENERATOR Figure 4
MEMORY
The memory map of the DS1921H/Z is shown in Figure 5. The 4096-bit general-purpose SRAM make up
pages 0 through 15. The timekeeping, control, and counter registers fill page 16, called Register Page (see
Figure 6). Pages 17 to 19 are assigned to storing the alarm time stamps and durations. The temperature
histogram bins begin at page 64 and use up to four pages. The temperature logging memory covers pages
128 to 191. Memory pages 20 to 63, 68 to 127, and 192 to 255 are reserved for future extensions. The
scratchpad is an additional page that acts as a buffer when writing to the SRAM memory or the register
page. The memory pages 17 and higher are read-only for the user. They are written to or erased solely
under supervision of the on-chip control logic.
DS1921H/Z MEMORY MAP Figure 5
X
ADDRESS
0000h to
01FFh
0200h to
021Fh
0220h to
027Fh
0280h to
07FFh
0800h to
087Fh
0880h to
0FFFh
1000h to
17FFh
1800h to
1FFFh
0
STAGE
1
st
X
1
STAGE
2
nd
X
32-Byte Intermediate Storage Scratchpad
2
STAGE
General-Purpose SRAM (16 Pages)
3
Alarm Time Stamps and Durations
Temperature Histogram Memory
rd
(Reserved for Future Extensions)
(Reserved for Future Extensions)
(Reserved for Future Extensions)
Datalog Memory (64 Pages)
X
32-Byte Register Page
3
STAGE
4
th
Polynomial = X
5 of 45
X
8
4
+ X
STAGE
5
5
th
+ X
4
+ 1
Pages 128 to 191
Pages 192 to 255
X
Pages 68 to 127
Pages 17 to 19
Pages 20 to 63
Pages 64 to 67
5
Pages 0 to 15
STAGE
Page 16
6
th
INPUT DATA
X
6
STAGE
7
th
X
7
STAGE
8
th
DS1921H/Z
X
8

Related parts for DS1921H-F5#