DS1921H-F5# Maxim Integrated Products, DS1921H-F5# Datasheet - Page 37

IBUTTON THERMOCHRON F5

DS1921H-F5#

Manufacturer Part Number
DS1921H-F5#
Description
IBUTTON THERMOCHRON F5
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1921H-F5#

Rohs Information
IButton RoHS Compliance Plan
Memory Size
512B
Memory Type
NVSRAM (Non-Volatile SRAM)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
STEP 2
Set the EMCLR bit to 1, enable the RTC and then execute the Clear Memory command. The RTC
oscillator must be stable before the Clear Memory command is issued. Wait 500 µs after issuing the Clear
Memory command before proceeding to Step 3. This results in the following data to be written to the
Status Register:
With only a single DS1921H/Z connected to the bus master, the communication of step 2 is as follows:
Address:
Data:
MASTER MODE
RX
RX
RX
RX
RX
RX
RX
RX
RX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
TX
20Eh
40h
DATA (LSB FIRST)
(Presence)
(Presence)
(Presence)
(Presence)
(Presence)
(Reset)
(Reset)
(Reset)
(Reset)
(Reset)
CCh
CCh
CCh
CCh
AAh
0Eh
0Eh
0Eh
0Eh
0Eh
3Ch
0Fh
02h
40h
02h
40h
55h
02h
37 of 45
COMMENTS
Reset pulse (480μs to 960µs)
Presence pulse
Issue Skip ROM command
Issue Write Scratchpad command
TA1, beginning offset = 0Eh
TA2, address = 020Eh
Write status byte to scratchpad
Reset pulse
Presence pulse
Issue Skip ROM command
Issue Read Scratchpad command
Read TA1, beginning offset = 0Eh
Read TA2, address = 020Eh
Read E/S, ending offset = 0Eh, flags = 0h
Read scratchpad data and verify
Reset pulse
Presence pulse
Issue Skip ROM command
Issue Copy Scratchpad command
TA1
TA2
E/S
Reset pulse
Presence pulse
Issue Skip ROM command
Issue Clear Memory command
Reset pulse
Presence pulse
(AUTHORIZATION CODE)
DS1921H/Z

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