DS1923-F5# Maxim Integrated Products, DS1923-F5# Datasheet - Page 24

IBUTTON TEMP/HUMIDITY LOGGER F5

DS1923-F5#

Manufacturer Part Number
DS1923-F5#
Description
IBUTTON TEMP/HUMIDITY LOGGER F5
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1923-F5#

Rohs Information
IButton RoHS Compliance Plan
Memory Size
512B
Memory Type
NVSRAM (Non-Volatile SRAM)
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption

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Hygrochron Temperature/Humidity Logger
iButton with 8KB Data-Log Memory
The Device Samples Counter register is similar to the
Mission Samples Counter register. During a mission this
counter increments whenever the DS1923 wakes up to
measure and log data and when the device is testing
for a temperature alarm in Start Mission Upon
Temperature Alarm mode. Between missions, the
counter increments whenever the Forced Conversion
command is executed. This way the Device Samples
Counter register functions like a gas gauge for the bat-
tery that powers the iButton.
The Device Samples Counter register is reset to zero
when the iButton is assembled. The counter increments
a couple of times during final test. The number format is
24-bit unsigned integer. The maximum number that can
be represented in this format is 16,777,215.
The code in the Device Configuration register allows the
master to distinguish between the DS2422 chip and dif-
ferent versions of the DS1922 iButtons. The Device
Configuration Register Bitmap table shows the codes
assigned to the various devices.
Note: There is only read access to this register.
Note: There is only read access to this register.
Note: During a mission, there is only read access to this register.
24
ADDRESS
ADDRESS
ADDRESS
0226h
0223h
0224h
0225h
0227h
______________________________________________________________________________________
BIT 7
BIT 7
0
0
0
0
1
BIT 7
BIT 6
0
0
1
1
0
BIT 6
BIT 6
Other Indicators
BIT 5
0
1
0
1
0
BIT 5
BIT 5
BIT 4
0
0
0
0
0
BIT 4
BIT 4
Center Byte
High Byte
Low Byte
The DS1923 is designed to use two passwords that
control read access and full access. Reading from or
writing to the scratchpad as well as the Forced
Conversion command does not require a password.
The password must be transmitted immediately after
the command code of the memory or control function. If
password checking is enabled, the password transmit-
ted is compared to the passwords stored in the device.
The data pattern stored in the Password Control regis-
ter determines whether password checking is enabled.
To enable password checking, the EPW bits need to
form a binary pattern of 10101010 (AAh). The default
pattern of EPW is different from AAh. If the EPW pattern
is different from AAh, any pattern is accepted as long
as it has a length of exactly 64 bits. Once enabled,
changing the passwords and disabling password
checking requires the knowledge of the current full-
access password.
BIT 3
Device Samples Counter Register Bitmap
EPW
0
0
0
0
0
Device Configuration Register Bitmap
BIT 3
BIT 3
Password Control Register Bitmap
BIT 2
0
0
0
0
0
BIT 2
BIT 2
BIT 1
0
0
0
0
0
Security by Password
BIT 1
BIT 1
BIT 0
0
0
0
0
0
DS1922L
DS1922T
DS1922E
DS2422
DS1923
BIT 0
BIT 0
PART

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