HCPL-2602#300 Avago Technologies US Inc., HCPL-2602#300 Datasheet
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HCPL-2602#300
Specifications of HCPL-2602#300
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HCPL-2602#300 Summary of contents
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... CAUTION advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Features • 1000 V/ s minimum Common Mode Rejection (CMR for HCPL-2602 and 3.5 kV/ s minimum CM CMR at V • Line termination included – no extra circuitry required • Accepts a broad range of drive conditions • ...
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... Notes: 1. HCPL-2602/2612 devices include input current regulator kV/ s with can be achieved using Avago application circuit Enable is available for single channel products only, except for HCPL-193X devices. 2 8-Pin DIP (300 Mil) Small-Outline SO-8(400 Mil) Single Dual Single Channel Channel Channel ...
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... To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: HCPL-2602-500E to order product of Gull Wing Surface Mount package in Tape and Reel packaging and RoHS compliant. Example 2: HCPL-2612 to order product of 300 mil DIP package in Tube packaging and non RoHS compliant. ...
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Package Outline Drawings 8-Pin DIP Package 9.65 ± 0.25 (0.380 ± 0.010 XXXXZ YYWW 1 2 1.19 (0.047) MAX. 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) 8-Pin DIP Package with Gull Wing ...
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... V DIN IEC 112/VDE 0303 Part 1 IIIa Material Group (DIN VDE 0110, 1/89, Table 1) Regulatory Information The HCPL-2602/2612 have been approved by the following organizations: UL Recognized under UL 1577, Component Recognition Program, File E55361. CSA ...
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Absolute Maximum Ratings (No Derating Required Parameter Storage Temperature Operating Temperature Forward Input Current Reverse Input Current Input Current, Pin 4 Supply Voltage (1 Minute Maximum) Enable Input Voltage (Not to Exceed V more than 500 ...
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Electrical Characteristics Over recommended temperature (T A Parameter Sym. High Level Output I OH Current Low Level Output V OL Voltage High Level Supply I CCH Current Low Level Supply I CCL Current High Level Enable I EH Current Low ...
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... EHL Time of Enable from Common Mode HCPL-2602 Transient | Immunity at High HCPL-2612 Output Level Common Mode HCPL-2602 Transient | Immunity at Low HCPL-2612 Output Level *All typicals Package Characteristics All Typicals Parameter Sym. Input-Output Momentary V ISO * Withstand Voltage Input-Output Resistance R Input-Output Capacitance C *The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equipment level safety specification or Avago Application Note 1074 entitled “ ...
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Notes: 1. Bypassing of the power supply line is required, with a 0.1 F ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 15. Total lead length between both ends of the capacitor and the isolator pins should ...
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I I PULSE GEN INPUT 3 MONITORING NODE GND *C IS APPROXIMATELY 15 pF WHICH INCLUDES L PROBE AND STRAY WIRING CAPACITANCE. ...
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RISE FALL 300 L 290 350 350 ...
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... HCPL-2602/12 without the need for additional series or shunt resistors. If reversing line drive is used it may be desirable to use two HCPL- 2602/ external Schottky diode to optimize data rate. Polarity Non-Reversing Drive High data rates can be obtained with the HCPL-2602/12 with polarity non-reversing drive ...
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Figure a. Polarity non-reversing. Figure b. Polarity reversing, single ended. Figure c. Polarity reversing, split phase. Figure d. Flip-flop configurations. ...
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... HCPL-2602/ connected directly to the driver terminals. Worst case drive conditions, however, would require current shunting to prevent overstress of the HCPL- 2602/12. Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew Propagation delay is a figure of merit which describes how quickly a logic signal propagates through a system ...
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I I 50 PSK Figure 16. Illustration of propagation delay skew - t 15 DATA INPUTS CLOCK DATA OUTPUTS CLOCK Figure 17. Parallel data transmission example. . PSK ...
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