HCPL-314J#500 Avago Technologies US Inc., HCPL-314J#500 Datasheet - Page 6

• Manufacturer Part Number: HCPL-314J#500
• Description: OPTOCOUPLER 2CH 0.6A 16-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-314J#500

• Package / Case: 16-SOIC (0.300", 7.50mm Width)
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 2, Unidirectional
• Propagation Delay High - Low @ If: 300ns @ 8mA
• Current - Dc Forward (if): 25mA
• Input Type: DC
• Output Type: Open Collector
• Mounting Type: Surface Mount
• Isolation Voltage: 3750 Vrms
• Maximum Fall Time: 50 ns
• Maximum Forward Diode Current: 25 mA
• Maximum Rise Time: 50 ns
• Minimum Forward Diode Voltage: 1.2 V
• Output Device: Logic Gate Photo IC
• Configuration: 2 Channel
• Maximum Forward Diode Voltage: 1.8 V
• Maximum Reverse Diode Voltage: 5 V
• Maximum Power Dissipation: 260 mW
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Package Characteristics
For each channel unless otherwise specified.
Notes:
6
10. PDD is the difference between t
11. Pins 3 and 4 (HCPL-314J) need to be connected to LED common.
12. Common mode transient immunity in the high state is the maximum tolerable |dVcm/dt| of the common mode pulse V
13. Common mode transient immunity in a low state is the maximum tolerable |dV
14. This load condition approximates the gate load of a 1200 V/25 A IGBT.
15. For each channel. The power supply current increases when operating frequency and Qg of the driven IGBT increases.
16. Device considered a two terminal device: Channel one output side pins shorted together, and channel two output side pins shorted togeth-
Parameter
Input-Output Momentary
Withstand Voltage
Output-Output Momentary
Withstand Voltage
Input-Output Resistance
Input-Output Capacitance
1. Derate linearly above 70°C free air temperature at a rate of 0.3 mA/°C.
2. Maximum pulse width = 10 μs, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with I
3. Derate linearly above 85°C, free air temperature at the rate of 4.0 mW/°C.
4. Input power dissipation does not require derating.
5. Maximum pulse width = 50 μs, maximum duty cycle = 0.5%.
6. In this test, V
7. Maximum pulse width = 1 ms, maximum duty cycle = 20%.
8. In accordance with UL 1577, each HCPL-314J optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V
9. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together.
peak minimum = 0.4 A. See Application section for additional details on limiting I
This test is performed before 100% production test for partial discharge (method B) shown in the IEC/EN/DIN EN 60747-5-2 Insulation Char-
acteristics Table, if applicable.
output will remain in the high state (i.e. Vo > 6.0 V).
output will remain in a low state (i.e. Vo < 1.0 V).
er.
OH
is measured with a DC load current. When driving capacitive load V
PHL
and t
Symbol
V
V
R
C
ISO
O-O
I-O
I-O
PLH
between any two parts or channels under the same test conditions.
Min.
5000
1500
Typ.
10
1.2
12
Max.
CM
OL
/dt| of the common mode pulse, V
OH
Units
Vrms
Vrms
Ω
pF
peak.
will approach V
Test Conditions
T
RH<50%
for 1 min.
V
Freq=1 MHz
A
I-O
=25°C,
=500 V
CC
as I
OH
approaches zero amps.
CM
Fig.
, to assure that the
CM
rms
to assure that the
for 1 second.
Note
8,9
16
9
O