HCPL-314J#500 Avago Technologies US Inc., HCPL-314J#500 Datasheet - Page 11

• Manufacturer Part Number: HCPL-314J#500
• Description: OPTOCOUPLER 2CH 0.6A 16-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-314J#500

• Package / Case: 16-SOIC (0.300", 7.50mm Width)
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 2, Unidirectional
• Propagation Delay High - Low @ If: 300ns @ 8mA
• Current - Dc Forward (if): 25mA
• Input Type: DC
• Output Type: Open Collector
• Mounting Type: Surface Mount
• Isolation Voltage: 3750 Vrms
• Maximum Fall Time: 50 ns
• Maximum Forward Diode Current: 25 mA
• Maximum Rise Time: 50 ns
• Minimum Forward Diode Voltage: 1.2 V
• Output Device: Logic Gate Photo IC
• Configuration: 2 Channel
• Maximum Forward Diode Voltage: 1.8 V
• Maximum Reverse Diode Voltage: 5 V
• Maximum Power Dissipation: 260 mW
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Selecting the Gate Resistor (Rg)
Step 1: Calculate R
Rg in Figure 24 can be analyzed as a simple RC circuit with a voltage sup-
plied by the HCPL-314J.
The V
of 0.6A. (See Figure 6).
Step 2: Check the HCPL-314J power dissipation and increase Rg if necessary.
The HCPL-314J total power dissipation (P
ter power (P
P
P
P
where K
stant of 0.001 mA/(nC*kHz). For the circuit in Figure 19 with I
= 10 mA, Rg = 32 Ω, Max Duty Cycle = 80%, Qg = 100 nC, f = 20 kHz and
T
P
P
< 260 mW (P
The value of 3 mA for I
operating temperature range.
Since P
dissipation.
11
AMAX
T
E
O
E
O
= P
= I
= 10 mA x 1.8 V x 0.8 = 14 mW
= (I
= 128 mW
= P
= (3 mA + (0.001 mA/(nC x kHz)) x 20 kHz x 100 nC) x 24 V + 0.4 μJ x 20 kHz
F
OL
E
O(BIAS)
CCBIAS
x V
= 85°C:
+ P
O
ICC
value of 5 V in the previous equation is the V
Rg ≥
for this case is less than P
F
O
x Duty Cycle
x Qg x f is the increase in I
=
= 32 Ω
E
+ K
+ P
O(MAX)
) and the output power (P
24 V – 5 V
V
CC
ICC
O(SWITCHING)
I
OLPEAK
g
– V
x Qg x f) x V
0.6A
minimum from the I
@ 85°C)
OL
CC
in the previous equation is the max. I
= I
CC
CC
x V
+ E
O(MAX)
CC
SW
CC
+ E
(Rg,Qg) x f
OL
O
due to switching and K
).
, Rg = 32 Ω is alright for the power
SW
T
peak specification. The IGBT and
) is equal to the sum of the emit-
(Rg,Qg)x f
OL
at the peak current
F
(worst case)
CC
ICC
over entire
is a con-
Figure 20. Energy Dissipated in the HCPL-314J
and for Each IGBT Switching Cycle.
LED Drive Circuit Considerations for Ultra
High CMR Performance
Without a detector shield, the domi-
nant cause of optocoupler CMR
failure is capacitive coupling from
the input side of the optocoupler,
through the package, to the detec-
tor IC as shown in Figure 21. The
HCPL-314J improves CMR perfor-
mance by using a detector IC with an
optically transparent Faraday shield,
which diverts the capacitively cou-
pled current away from the sensi-
tive IC circuitry. However, this shield
does not eliminate the capacitive
coupling between the LED and opt-
ocoupler pins 5-8 as shown in Figure
22. This capacitive coupling causes
perturbations in the LED current
during common mode transients
and becomes the major source of
CMR failures for a shielded optocou-
pler. The main design objective of a
high CMR LED drive circuit becomes
keeping the LED in the proper state
(on or off ) during common mode
transients. For example, the recom-
mended application circuit (Figure
19), can achieve 10 kV/μs CMR while
minimizing component complexity.
Techniques to keep the LED in the
proper state are discussed in the
next two sections.
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
Rg – GATE RESISTANCE – Ω
20
40
60
Qg = 50 nC
Qg = 100 nC
Qg = 200 nC
Qg = 400 nC
80
100