AT88SA10HS-TSU-T Atmel, AT88SA10HS-TSU-T Datasheet - Page 4

• Manufacturer Part Number: AT88SA10HS-TSU-T
• Description: IC HOST AUTHENTICATION SOT23-3
• Manufacturer: Atmel
• Series: CryptoAuthentication™r
• Type: Authentication Chipr

Specifications of AT88SA10HS-TSU-T

• Applications: Networking & Communications
• Mounting Type: Surface Mount
• Package / Case: SOT-23-3
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: 1 Wire
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 1
• Program Memory Size: 72 bit
• Program Memory Type: ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.6.
2.
2.1.
4
Security Features
The AT88SA10HS incorporates a number of physical security features designed to protect the keys from release.
These include an active shield over the entire surface of the part, internal memory encryption, internal clock generation,
glitch protection, voltage tamper detection and other physical design features.
Pre-programmed keys stored on the AT88SA10HS are encrypted in such a way as to make retrieval of their values via
outside analysis very difficult.
Both the clock and logic supply voltage are internally generated, preventing any direct attack via the pins on these two
signals.
IO Protocol
Communications to and from the AT88SA10HS take place over a single asynchronously timed wire using a pulse count
scheme. The overall communications structure is a hierarchy:
Table 2.
Refer to Applications Notes on Atmel’s website for more details on how to use any microprocessor to easily generate
the signaling necessary to send these values to the chip.
IO Tokens
There are a number of IO tokens that may be transmitted along the bus:
The waveforms are the same in either direction, however there are some differences in timing based on the
expectation that the host has a very accurate and consistent clock while the AT88SA10HS has significant variation in
its internal clock generator due to normal manufacturing and environmental fluctuations.
The bit timings are designed to permit a standard UART running at 230.4K baud to transmit and receive the tokens
efficiently. Each byte transmitted or received by the UART corresponds to a single bit received or transmitted by the
AT88SA10HS. Refer to Applications Notes on Atmel’s website for more details.
AT88SA10HS Host Authentication Chip [Preliminary]
Tokens
Flags
Blocks
Packets
Input: (To AT88SA10HS)
Output: (From AT88SA10HS)
Wake
Zero
One
ZeroOut
OneOut
Implement a single data bit transmitted on the bus, or the wake-up event.
Comprised of eight tokens (bits) which convey the direction and meaning of the next group of bits (if any)
which may be transmitted.
Data following the command and transmit flags. They incorporate both a byte count and a checksum to
ensure proper data transmission.
Bytes forming the core of the block without the count and CRC. They are either the input or output
parameters of the AT88SA10HS command or status information from the AT88SA10HS.
IO Hierarchy
Wake the AT88SA10HS up from sleep (low power) state
Send a single bit from system to the AT88SA10HS with a value of 0
Send a single bit from system to the AT88SA10HS with a value of 1
Send a single bit from the AT88SA10HS to the system with a value of 0
Send a single bit from the AT88SA10HS to the system with a value of 1
8595B–SMEM–09/09