LM5085MY/NOPB National Semiconductor, LM5085MY/NOPB Datasheet - Page 16

• Manufacturer Part Number: LM5085MY/NOPB
• Description: IC BUCK ADJ 8MSOPEP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Step-Down (Buck)r

Specifications of LM5085MY/NOPB

• Design Resources: LM(2)5085 Quick Start Calculator
• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.25 ~ 75 V
• Frequency - Switching: Up to 1MHz
• Voltage - Input: 4.5 ~ 75 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP Exposed Pad, 8-HMSOP, 8-eMSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -
• Other names: LM5085MY

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C
vides not only noise filtering and stability for the VCC regula-
tor, but also provides the surge current for the PFET gate
drive. The typical recommended value for C
good quality, low ESR, ceramic capacitor is recommended.
C
VCC pins. If the selected PFET has a Total Gate Charge
specification of 100 nC or larger, or if the circuit is required to
operate at input voltages below 7 volts, a larger capacitor may
be required. The maximum recommended value for C
1 µF.
IC Power Dissipation: The maximum power dissipated in the
LM5085 package is calculated using Equation 12 at the max-
VCC
VCC
: The capacitor at the VCC pin (from VIN to VCC) pro-
must be located as close as possible to the VIN and
VCC
is 0.47 µF. A
FIGURE 4. Example Circuit
VCC
is
16
imum input voltage. The Total Gate Charge for the Si7465
PFET is specified to be 40 nC (max) in its data sheet. There-
fore the total power dissipation within the LM5085 is calcu-
lated to be:
Using an MSOP-8EP package with a θ
a temperature rise of 34°C from junction to ambient.
Final Design Example Circuit
The final circuit is shown in Figure 4, and its performance is
presented in Figure 5 through Figure 8.
P
DISS
= 55V x ((40 nC x 300 kHz) + 1.4 mA) = 737 mW
JA
of 46°C/W produces
30057742