LT3431IFE#TR Linear Technology, LT3431IFE#TR Datasheet - Page 18

IC REG SW STDN 3A 500KHZ 16TSSOP

LT3431IFE#TR

Manufacturer Part Number
LT3431IFE#TR
Description
IC REG SW STDN 3A 500KHZ 16TSSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LT3431IFE#TR

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.2 ~ 48 V
Current - Output
3A
Frequency - Switching
500kHz
Voltage - Input
5.5 ~ 60 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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LT3431
APPLICATIO S I FOR ATIO
The V
possible from the switch and boost nodes. The LT3431
pinout has been designed to aid in this. The ground for
these components should be separated from the switch
current path. Failure to do so will result in poor stability or
subharmonic like oscillation.
Board layout also has a significant effect on thermal
resistance. Pins 1, 8, 9 and 16, GND, are a continuous
copper plate that runs under the LT3431 die. This is an
exposed pad and is the best thermal path for heat out of the
package. Soldering the exposed pad to the copper ground
plane under the device will reduce die temperature and
increase the power capability of the LT3431. Adding
multiple solder filled feedthroughs under and around the
four corner pins to the ground plane will also help. Similar
treatment to the catch diode and coil terminations will
reduce any additional heating effects.
PARASITIC RESONANCE
Resonance or “ringing” may sometimes be seen on the
switch node (see Figure 7). Very high frequency ringing
following switch rise time is caused by switch/diode/input
capacitor lead inductance and diode capacitance. Schot-
tky diodes have very high “Q” junction capacitance that
can ring for many cycles when excited at high frequency.
If total lead length for the input capacitor, diode and
switch path is 1 inch, the inductance will be approximately
25nH. At switch off, this will produce a spike across the
NPN output device in addition to the input voltage. At
higher currents this spike can be in the order of 10V to 20V
or higher with a poor layout, potentially exceeding the
18
C
and FB components should be kept as far away as
2V/DIV
Figure 7. Switch Node Resonance
U
SW RISE
U
50ns/DIV
SW FALL
W
3431 F07
U
absolute max switch voltage. The path around switch,
catch diode and input capacitor must be kept as short as
possible to ensure reliable operation. When looking at this,
a >100MHz oscilloscope must be used, and waveforms
should be observed on the leads of the package. This
switch off spike will also cause the SW node to go below
ground. The LT3431 has special circuitry inside which
mitigates this problem, but negative voltages over 0.8V
lasting longer than 10ns should be avoided. Note that
100MHz oscilloscopes are barely fast enough to see the
details of the falling edge overshoot in Figure 7.
A second, much lower frequency ringing is seen during
switch off time if load current is low enough to allow the
inductor current to fall to zero during part of the switch off
time (see Figure 8). Switch and diode capacitance reso-
nate with the inductor to form damped ringing at 1MHz to
10MHz. This ringing is not harmful to the regulator and it
has not been shown to contribute significantly to EMI. Any
attempt to damp it with a resistive snubber will degrade
efficiency.
THERMAL CALCULATIONS
Power dissipation in the LT3431 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following formu-
las show how to calculate each of these losses. These
formulas assume continuous mode operation, so they
should not be used for calculating efficiency at light load
currents.
0.2A/DIV
5V/DIV
V
V
L = 10 H
IN
OUT
= 12V
Figure 8. Discontinuous Mode Ringing
= 5V
500ns/DIV
3431 F08
INDUCTOR
CURRENT AT
I
SWITCH NODE
VOLTAGE
OUT
= 0.1A
sn3431 3431fs

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