LTC1628IG-SYNC#PBF Linear Technology, LTC1628IG-SYNC#PBF Datasheet - Page 18

• Manufacturer Part Number: LTC1628IG-SYNC#PBF
• Description: IC SW REG STEP-DOWN 28-SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1628IG-SYNC#PBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: Adj to 0.8V
• Current - Output: 3A
• Frequency - Switching: 140kHz ~ 310kHz
• Voltage - Input: 3.5 ~ 30 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
LTC1628-SYNC
output-derived voltage that has been boosted to greater
than 4.7V. This can be done with either the inductive boost
winding as shown in Figure 6a or the capacitive charge
pump shown in Figure 6b. The charge pump has the
advantage of simple magnetics.
Topside MOSFET Driver Supply (C
External bootstrap capacitors C
pins supply the gate drive voltages for the topside MOS-
FETs. Capacitor C
though external diode D
low. When one of the topside MOSFETs is to be turned on,
the driver places the C
the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage, SW,
rises to V
MOSFET on, the boost voltage is above the input supply:
V
C
of the topside MOSFET(s). The reverse breakdown of the
external Schottky diode must be greater than V
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
Output Voltage
The LTC1628-SYNC output voltages are each set by an
external feedback resistive divider carefully placed across
18
BOOST
B
needs to be 100 times that of the total input capacitance
Figure 6a. Secondary Output Loop & EXTV
R6
R5
= V
OPTIONAL EXTV
CONNECTION
5V < V
EXTV
FCB
SGND
IN
LTC1628-SYNC
IN
and the BOOST pin follows. With the topside
CC
SEC
+ V
< 7V
INTVCC
PGND
B
CC
BG1
TG1
SW
U
V
in the functional diagram is charged
IN
B
. The value of the boost capacitor
B
voltage across the gate-source of
N-CH
N-CH
from INTV
U
V
IN
+
B
connected to the BOOST
C
W
IN
CC
B
1:N
, D
T1
when the SW pin is
B
CC
)
R
Connection
SENSE
V
SEC
U
+
+
IN(MAX)
1628 F06a
1µF
C
V
OUT
OUT
.
the output capacitor. The resultant feedback signal is
compared with the internal precision 0.800V voltage ref-
erence by the error amplifier. The output voltage is given
by the equation:
where R1 and R2 are defined in Figure 2.
SENSE
The common mode input range of the current comparator
sense pins is from 0V to (1.1)INTV
operation is guaranteed throughout this range allowing
output voltage setting from 0.8V to 7.7V, depending upon
the voltage applied to EXTV
stage is biased with internal resistors from an internal
2.4V source as shown in the Functional Diagram. This
requires that current either be sourced or sunk from the
SENSE pins depending on the output voltage. If the output
voltage is below 2.4V current will flow out of both SENSE
pins to the main output. The output can be easily preloaded
by the V
comparator’s negative input bias current. The maximum
current flowing out of each pair of SENSE pins is:
Since V
can choose R1 in Figure 2 to have a maximum value to
absorb this current.
I
V
SENSE
OUT
EXTV
+
LTC1628-SYNC
OSENSE
OUT
/SENSE
Figure 6b. Capacitive Charge Pump for EXTV
CC
+
=
+ I
0 8
resistive divider to compensate for the current
.
SENSE
PGND
is servoed to the 0.8V reference voltage, we
V
BG1
TG1
–
SW
V
⎛
⎜
⎝
IN
1
Pins
C
+
–
IN
= (2.4V – V
N-CH
N-CH
R
R
+
2
1
⎞
⎟
⎠
V
IN
CC
BAT85
. A differential NPN input
OUT
L1
CC
)/24k
VN2222LL
. Continuous linear
0.22µF
R
SENSE
+
+
1628 F06b
CC
BAT85
1µF
BAT85
C
V
OUT
OUT
1628syncfa