LT1737CS Linear Technology, LT1737CS Datasheet - Page 15

• Manufacturer Part Number: LT1737CS
• Description: IC CTRLR ISOLATED FLYBACK 16SOIC
• Manufacturer: Linear Technology
• Type: Flybackr

Specifications of LT1737CS

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Frequency - Switching: 50kHz ~ 250kHz
• Voltage - Input: 4.1 ~ 20 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -

APPLICATIO S I FOR ATIO
implications regarding output voltage regulation at mini-
mum load (see Minimum Load Considerations).
A second benefit of the enable delay time function occurs
at light load. Under such conditions the amount of energy
stored in the transformer is small. The flyback waveform
becomes “lazy” and some time elapses before it indicates
the actual secondary output voltage (see Figure 4C). So
the enable delay time should also be set long enough to
ignore the “irrelevant” portion of the flyback waveform at
light load.
Additionally, there are cases wherein the gate output is
called upon to drive a large geometry MOSFET such that
the turnoff transition is slowed significantly. Under such
circumstances, the enable delay time may be increased to
accommodate for the lengthy transition.
A
B
C
Minimum Enable Time
This function sets a minimum duration for the expected
flyback pulse. Its primary purpose is to provide a mini-
mum source current at the V
problems.
ENABLE DELAY
TIME NEEDED
NEEDED
ENABLE
DELAY
TIME
U
Figure 4
U
DISCONTINUOUS
C
RINGING
MODE
node to avoid start-up
W
MOSFET GATE DRIVE
IDEALIZED FLYBACK
WAVEFORM
FLYBACK WAVEFORM
WITH LARGE LEAKAGE
SPIKE AT HEAVY LOAD
“SLOW” FLYBACK
WAVEFORM AT
LIGHT LOAD
U
1737 F04
Minimum enable time can also have implications at light
load (see Minimum Load Considerations). The temptation
is to set the minimum enable time to be fairly short, as this
is the least restrictive in terms of minimum load behavior.
However, to provide a “reliable” minimum start-up current
of say, nominally 1µA, the user should set the minimum
enable time at no less that 2% of the switching period
(= 1/switching frequency).
CURRENT SENSE RESISTOR CONSIDERATIONS
The external current sense resistor allows the user to
optimize the current limit behavior for the particular appli-
cation under consideration. As the current sense resistor
is varied from several ohms down to tens of milliohms,
peak switch current goes from a fraction of an ampere to
tens of amperes. Care must be taken to ensure proper
circuit operation, especially with small current sense
resistor values.
For example, a peak switch current of 10A requires a
sense resistor of 0.025Ω. Note that the instantaneous
peak power in the sense resistor is 2.5W, and it must be
rated accordingly. The LT1737 has only a single sense line
to this resistor. Therefore, any parasitic resistance in the
ground side connection of the sense resistor will increase
its apparent value. In the case of a 0.025Ω sense resistor,
one milliohm of parasitic resistance will cause a 4%
reduction in peak switch current. So resistance of printed
circuit copper traces and vias cannot necessarily be
ignored.
An additional consideration is parasitic inductance. In-
ductance in series with the current sense resistor will
accentuate the high frequency components of the current
waveform. In particular, the gate switching spike and
multimegahertz ringing at the MOSFET can be
considerably amplified. If severe enough, this can cause
erratic operation. For example, assume 3nH of parasitic
inductance (equivalent to about 0.1 inch of wire in free
space) is in series with an ideal 0.025Ω sense resistor.
A “zero” will be formed at f = R/(2πL), or 1.3MHz. Above
Minimum Enable Time
Average “start-up” V
Switching Frequency
C
current =
•
I
SRC
LT1737
15
1737fa