LT1737CS Linear Technology, LT1737CS Datasheet - Page 13

• Manufacturer Part Number: LT1737CS
• Description: IC CTRLR ISOLATED FLYBACK 16SOIC
• Manufacturer: Linear Technology
• Type: Flybackr

Specifications of LT1737CS

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Frequency - Switching: 50kHz ~ 250kHz
• Voltage - Input: 4.1 ~ 20 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -

APPLICATIO S I FOR ATIO
which reduces the size of the primary-referred flyback
pulse used for feedback. This will increase the output
voltage target by a similar percentage. Note that unlike
leakage spike behavior, this phenomena is load indepen-
dent. To the extent that the secondary leakage inductance
is a constant percentage of mutual inductance (over
manufacturing variations), this can be accommodated by
adjusting the feedback resistor divider ratio.
Winding Resistance Effects
Resistance in either the primary or secondary will act to
reduce overall efficiency (P
secondary increases effective output impedance which
degrades load regulation, (at least before load compensa-
tion is employed).
Bifilar Winding
A bifilar or similar winding technique is a good way to
minimize troublesome leakage inductances. However, re-
member that this will increase primary-to-secondary ca-
pacitance and limit the primary-to-secondary breakdown
voltage, so bifilar winding is not always practical.
Finally, the LTC Applications group is available to assist
in the choice and/or design of the transformer. Happy
Winding!
SELECTING FEEDBACK RESISTOR DIVIDER VALUES
The expression for V
tion can be rearranged to yield the following expression for
the R1/R2 ratio:
The above equation defines only the ratio of R1 to R2, not
their individual values. However, a “second equation for
V
V
I
V
N
(
SEC
R
OUT
F
BG
ST
1
= switching diode forward voltage
R
+
• ESR = secondary resistive losses
= effective secondary-to-third winding turns ratio
= data sheet reference voltage value
2
= desired output voltage
R
2
)
=
(
V
OUT
U
OUT
+
V
developed in the Operation sec-
U
F
V
+
BG
OUT
I
SEC
/P
•
IN
W
ESR
). Resistance in the
)
N
ST
where:
U
two unknowns” is obtained from noting that the Thevenin
impedance of the resistor divider should be roughly 3k for
bias current cancellation and other reasons.
SELECTING R
The Operation section previously derived the following
expressions for R
R
compensation:
While the value for R
determined, it is usually better in practice to employ
empirical methods. This is because several of the required
input variables are difficult to estimate precisely. For
instance, the ESR term above includes that of the trans-
former secondary, but its effective ESR value depends on
high frequency behavior, not simply DC winding resis-
tance. Similarly, K1 appears to be a simple ratio of V
V
mating efficiency is not a simple calculation. The sug-
gested empirical method is as follows:
Build a prototype of the desired supply using the eventual
secondary components. Temporarily ground the R
pin to disable the load compensation function. Operate the
supply over the expected range of output current loading
while measuring the output voltage deviation. Approxi-
mate this variation as a single value of R
approximation). Calculate a value for the K1 constant
based on V
ciency. These are then combined with R
to yield a value for R
Verify this result by connecting a resistor of roughly this
value from the R
ground short to R
filter capacitor to ground.) Measure the output impedance
with the new compensation in place. Modify the original
R
effective compensation.
OUT
OCMP
OCMP
R
R
OUT
OCMP
times (differential) efficiency, but theoretically esti-
, the external resistor value required for its nominal
value if necessary to increase or decrease the
=
=
ESR
IN
K
, V
OCMP
1
⎛
⎜
⎝
⎛
⎜
⎝
OUT
R
1
OUT
R
OCMP
–
SENSE
CMPC
OUT
1
RESISTOR VALUE
DC
and the measured (differential) effi-
OCMP
, i.e., effective output impedance and
OCMP
⎞
⎟
⎠
pin to ground. (Disconnect the
and connect the requisite 0.1µF
⎞
⎟
⎠
.
(
may therefore be theoretically
R
1
||
R
2
)
SENSE
OUT
(straight line
LT1737
as indicated
13
CMPC
IN
1737fa
to