EL7554IREZ Intersil, EL7554IREZ Datasheet - Page 13

• Manufacturer Part Number: EL7554IREZ
• Description: IC REG 4A DC-DC STEP DN 28HTSSOP
• Manufacturer: Intersil
• Type: Step-Down (Buck)r

Specifications of EL7554IREZ

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 6 V
• Current - Output: 4A
• Frequency - Switching: 370kHz
• Voltage - Input: 3 ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Primary Input Voltage: 3.3V
• No. Of Outputs: 1
• Output Voltage: 6V
• Output Current: 4A
• No. Of Pins: 28
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 3 - 168 Hours
• Current Rating: 4A
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

Thermal Management
The EL7554IRE is packaged in a thermally-efficient
HTSSOP-28 package, which utilizes the exposed thermal
pad at the bottom to spread heat through PCB metal.
Therefore:
The thermal resistance for this package is as low as +26°C/W
for 2 layer PCB of 0.39" thickness (see Figure 9). The actual
junction temperature can be measured at V
The thermal performance of the IC is heavily dependent on
the layout of the PCB. The user should exercise care during
the design phase to ensure the IC will operate within the
recommended environmental conditions.
1. The thermal pad must be soldered to the PCB
2. Maximize the PCB area
3. If a multiple layer PCB is used, thermal vias (13 to 25 mil)
must be placed underneath the thermal pad to connect to
ground plane(s). Do not place thermal reliefs on the vias.
Figure 25 shows a typical connection.
FIGURE 25. PCB LAYOUT - 28 Ld HTSSOP PACKAGE
COMPONENT SIDE
CONNECTION
13
GROUND PLANE
CONNECTION
TJ
pin.
EL7554
Layout Considerations
The layout is very important for the converter to function
properly. Follow these tips for best performance:
The demo board is a good example of layout based on this
outline. Please refer to the EL7554 Application Brief.
1. Separate the Power Ground ( ) and Signal Ground (
2. Place the input capacitor(s) as close to V
3. Make as small as possible the loop from LX pins to L to
4. Place R
5. Maximize the copper area around the PGND pins; do not
6. Thermal pad should be soldered to PCB. Place several
connect them only at one point right at the SGND pin
pins as possible
C
place thermal relief around them
via holes under the chip to the ground plane to help heat
dissipation
O
to PGND pins
1
and R
2
pins as close to the FB pin as possible
IN
and PGND
November 5, 2007
FN7360.5
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