LT1738EG#PBF Linear Technology, LT1738EG#PBF Datasheet - Page 12

• Manufacturer Part Number: LT1738EG#PBF
• Description: IC DC/DC CONTRLR LOW NOIS 20SSOP
• Manufacturer: Linear Technology
• Type: Step-Up (Boost), Cuk, Flybackr

Specifications of LT1738EG#PBF

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 5 ~ 100 V
• Frequency - Switching: 20kHz ~ 250kHz
• Voltage - Input: 2.55 ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -

APPLICATIO S I FOR ATIO
LT1738
Oscillator frequency is important for noise reduction in
two ways. First the lower the oscillator frequency the lower
the waveform’s harmonics, making it easier to filter them.
Second the oscillator will control the placement of the
output voltage harmonics which can aid in specific prob-
lems where you might be trying to avoid a certain fre-
quency bandwidth.
Oscillator Sync
If a more precise frequency is desired (e.g., to accurately
place harmonics) the oscillator can be synchronized to an
external clock. Set the RC timing components for an
oscillator frequency 10% lower than the desired sync
frequency.
Drive the SYNC pin with a square wave (with greater than
2V amplitude). The rising edge of the sync square wave
will initiate clock discharge. The sync pulse should have a
minimum pulse width of 0.5 s.
Be careful in sync’ing to frequencies much different from
the part since the internal oscillator charge slope deter-
mines slope compensation. It would be possible to get into
subharmonic oscillation if the sync doesn’t allow for the
charge cycle of the capacitor to initiate slope compensa-
tion. In general, this will not be a problem until the sync
frequency is greater than 1.5 times the oscillator free-run
frequency.
Slew Rate Setting
The primary reason to use this part is to gain advantage of
lower EMI and noise due to the slew control. The rolloff in
higher frequency harmonics has its theoretical basis with
two primary components. First, the clock frequency sets
the fundamental positioning of harmonics and second, the
associated normal frequency rolloff of harmonics.
This part creates a second higher frequency rolloff of
harmonics that inversely depends on the slew time, the
time that voltage or current spends between the off state
and on state. This time is adjustable through the choice of
the slew resistors, the external resistors to ground on the
R
the external voltage feedback capacitor C
the MOSFET drain) and the sense resistor. Lower slew
12
VSL
and R
CSL
pins and the external components used for
U
U
W
V
(from CAP to
U
rates (longer slew times, lower rolloff frequency for har-
monics ) are created with higher values of R
and the current sense resistor.
Setting the voltage and current slew rates should be done
empirically. The most practical way of determining these
components is to set C
Then, start by making R
in series with 3.3k. Starting from the lowest resistor
setting (fast slew) adjust the pots until the noise level
meets your guidelines. Note that slower slewing wave-
forms will dissipate more power so that efficiency will
drop. You can monitor this as you make your slew adjust-
ment by measuring input and output voltage and their
respective currents. Monitor the MOSFET temperature as
slew rates are slowed. The MOSFET will heat up as
efficiency decreases.
Measuring noise should be done carefully. It is easy to
introduce noise by poor measurement techniques. Con-
sult AN70 for recommended measurement techniques.
Keeping probe ground leads very short is essential.
Usually it will be desirable to keep the voltage and current
slew resistors approximately the same. There are circum-
stances where a better optimization can be found by
adjusting each separately, but as these values are sepa-
rated further, a loss of independence of control may occur.
It is possible to use a single slew setting resistor. In this
case the R
with a value of 1.8k to 34k (one half the individual resis-
tors) can then be tied from these pins to ground.
In general only the R
ment of current slew. The current slew time also depends
on the current sense resistor but this resistor is normally
set with consideration of the maximum current in the
MOSFET.
Setting the voltage slew also involves selection of the
capacitor C
output voltage swing (basically input voltage), the external
voltage feedback capacitor and the R
higher input voltages smaller capacitors will be used with
lower R
VSL
VSL
V
values. For a starting point use Table 2.
. The voltage slew time is proportional to the
and R
CSL
CSL
VSL
pins are tied together. A resistor
value will be available for adjust-
V
and the sense resistor value.
, R
CSL
each a 50k resistor pot
VSL
value. Thus at
VSL
, R
CSL
1738fa
, C
V