ADP3209JCPZ-RL ON Semiconductor, ADP3209JCPZ-RL Datasheet - Page 4

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ADP3209JCPZ-RL

Manufacturer Part Number
ADP3209JCPZ-RL
Description
IC CTRLR BUCK 5BIT GMCH 32LFCSP
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADP3209JCPZ-RL

Applications
Controller, Power Supplies for Next-Generation Intel Processors
Voltage - Input
4.5 ~ 5.5 V
Number Of Outputs
1
Voltage - Output
0.4 ~ 1.25 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
32-LFCSP
Output Voltage
0.4 V to 1.25 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADP3209JCPZ-RLTR

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Parameter
SWITCH AMPLIFIER
CURRENT LIMIT COMPARATOR
SOFT START/LATCH-OFF TIMER
SOFT TRANSIENT CONTROL
SYSTEM LOGIC INPUTS
POWER GOOD
POWER MONITOR
Common-Mode Range
Input Resistance
Input Current
Zero Current Switching Threshold
DCM Minimum Off Time Masking
Output Voltage Range
Output Current
Current Limit Threshold Voltage
Current Limit Setting Ratio
Output Current
Termination Threshold Voltage
Normal Mode Operating Voltage
Current Limit Latch-Off Voltage
ST Sourcing Current
ST Sinking Current
ST Offset Voltage
Minimum Capacitance
Extended PWRGD Masking
Input Low Voltage
Input High Voltage
Input Current
CSREF Undervoltage Threshold
CSREF Overvoltage Threshold
CSREF Crowbar (Overvoltage
CSREF Reverse Voltage Detection
PWRGD Output Low Voltage
PWRGD Output Leakage Current
PWRGD Masking Time
PMON Output Resistance
PMON Leakage Current
PMON Oscillator Frequency
PMONFS Voltage Range
PMONFS Output Current
Comparator Threshold
Protection) Threshold
Threshold
2
2
2
Symbol
V
R
I
V
t
V
I
V
I
V
V
I
I
V
C
V
V
V
I
I
V
V
V
V
V
SW
CLIM
SS
SOURCE(ST)
SINK(ST)
IN
IN
OFFMASK
SW
SW
ZCS(SW)
CLIM
CLTH
TH(SS)
ILO(SS)
OS(ST)
TH(ST)
IL
IH
UV(CSREF)
OV(CSREF)
CB(CSREF)
RVP(CSREF)
OL(PWRGD)
ST
Rev. 2 | Page 4 of 32 | www.onsemi.com
Conditions
SW = 0 V
SW falling
V
V
V
During startup, V
In normal mode, V
In current limit, V
During startup
After PWRGD goes high
Current limit or PWRGD failure, SS falling
ST = V
ST = V
|ST − V
|ST − V
VARFREQ
EN
VARFREQ
EN
EN, VARFREQ
EN = V
Relative to V
Relative to V
Relative to FBRTN
Relative to FBRTN
CSREF falling
CSREF rising
I
V
I
PMON = 5 V
PMONFS = 2 V
PMONFS = 2 V
SINK(PWRGD)
SINK
CLIM
CSREF
CL
PWRDG
/V
= 2 mA
= 1.25 V
CLIM
− V
DAC
DAC
VID
TH
VID
= 5 V
| at the end of PWRGD masking
, high-to-low or low-to-high
CSCOMP
|, ST falling
− 0.3 V
+ 0.3 V
= 4 mA
VID
VID
, R
= 0.4 V to 1.25 V
= 0.4 V to 1.25 V
CLIM
SS
SS
SS
< 1.7 V
> 1.7 V
= 125 kΩ
> 1.7 V
Min
−400
30
0.5
105
−11
1.5
1.6
1.6
−10
100
4
2.3
1.65
−425
1.5
Typ
45
−4
−6
475
−10
125
0.1
−7.5
−48
2
1.7
2.9
1.7
−7.5
2.5
150
20
60
−300
200
1.7
−300
−60
60
100
15
5
320
−10
Max
+200
60
3
145
−5
2.5
1.8
1.8
+35
0.7
1.0
250
1.75
100
3
4
Unit
mV
kΩ
µA
mV
ns
V
µA
mV
µA
µA
µA
V
V
V
µA
µA
mV
pF
mV
V
V
V
V
nA
µA
mV
mV
V
mV
mV
mV
µA
µs
nA
kHz
V
µA

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