L6731BTR STMicroelectronics, L6731BTR Datasheet - Page 20

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L6731BTR

Manufacturer Part Number
L6731BTR
Description
IC CTRLR ADJ STEP DOWN 16-TSSOP
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6731BTR

Applications
Controller, DDR
Voltage - Input
1.8 ~ 14 V
Number Of Outputs
1
Voltage - Output
Adjustable down to 0.6V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5099-2

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
L6731BTR
Manufacturer:
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Application details
Figure 12. Asymptotic Bode plot of Converter's open loop gain
20/24
The compensation network consists in the internal error amplifier, the impedance networks Z
(R3, R4 and C20) and Z
closed loop transfer function with the highest 0dB crossing frequency to have fastest transient
response (but always lower than fsw/10) and the highest gain in DC conditions to minimize the
load regulation error. A stable control loop has a gain crossing the 0dB axis with -20dB/decade
slope and a phase margin greater than 45°. To locate poles and zeroes of the compensation
networks, the following suggestions may be used:
Modulator singularity frequencies:
Compensation network singularity frequencies:
Compensation network design:
Put the gain R
Place
Place
Place
Place
Check the loop gain considering the error amplifier open loop gain.
P
Z
1
1
LC
Z1
Z2
P1
P2
R
R
5
before the output filter resonance
at the output filter resonance
5
at the output capacitor ESR zero
at one half of the switching frequency;
1
C
C
5
FB
19
C
L
/R
18
1
18
1
(R5, C18 and C19). The compensation network has to provide a
Cout
3
in order to obtain the desired converter bandwidth
C
C
C
(17)
19
19
R
R
5
3
(13)
(15)
Vin
Vosc
Z
2
LC
ESR
LC
P
C
;
(19)
2
20
ESR
ESR
LC
R
;
R
;
4
1
1
3
1
Cout
C
20
R
4
(16)
(14)
(18)
L6731B
IN

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