MAX8720ETX+ Maxim Integrated Products, MAX8720ETX+ Datasheet - Page 25

IC CNTRL VID STP DWN 36-TQFN

MAX8720ETX+

Manufacturer Part Number
MAX8720ETX+
Description
IC CNTRL VID STP DWN 36-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8720ETX+

Applications
Controller, CPU GPU
Voltage - Input
2 ~ 28 V
Number Of Outputs
1
Voltage - Output
0.28 ~ 1.85 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-TQFN Exposed Pad
Output Voltage
0.275 V to 1.85 V
Input Voltage
2 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
low under a load transient. Ignoring the sag due to
finite capacitance:
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, polymers, and other electrolytics).
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent V
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem (see the V
tions in the Transient Response section). However, low-
capacity filter capacitors typically have high-ESR zeros
that may affect the overall stability (see the Output-
Capacitor Stability Considerations section).
Stability is determined by the value of the ESR zero rel-
ative to the switching frequency. The boundary of insta-
bility is given by the following equation:
A voltage-positioned circuit has the ESR zero frequen-
cy lowered due to the external resistor in series with the
output-capacitor ESR, guaranteeing stability. For a volt-
age-positioned circuit, the minimum ESR requirement
of the output capacitor is reduced by the voltage-posi-
tioning resistor value.
The boundary condition of instability is given by the fol-
lowing equation:
For good phase margin, it is recommended to increase
the equivalent RC time constant by a factor of two. The
standard application circuit (Figure 1) operating at
300kHz with C
meets this requirement.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output-voltage-ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response under/overshoot.
Output-Capacitor Stability Considerations
f
where f
ESR
R
R
OUT
ESR
ESR
______________________________________________________________________________________
x C
= 1410µF and R
≤ V
f
ESR
SW
π
OUT
STEP
=
2
≥ 1 / (2 x f
π
/ I
R
LOAD(MAX)
ESR
SAG
SAG
1
Dynamically Adjustable 6-Bit VID
C
ESR
SW
and V
and V
OUT
)
= 3mΩ easily
SOAR
SOAR
equa-
from
Do not put high-value ceramic capacitors directly
across the feedback sense point without taking precau-
tions to ensure stability. Large ceramic capacitors can
have a high-ESR zero frequency and cause erratic,
unstable operation. However, it is easy to add enough
series resistance by placing the capacitors a couple of
inches downstream from the feedback sense point,
which should be as close as possible to the inductor.
Unstable operation manifests itself in two related but
distinctly different ways: double pulsing and fast-feed-
back loop instability. Double pulsing occurs due to
noise on the output or because the ESR is so low that
there is not enough voltage ramp in the output voltage
signal. This “fools” the error comparator into triggering
a new cycle immediately after the 400ns minimum off-
time period has expired. Double pulsing is more of a
nuisance than harmful, resulting in nothing worse than
increased output ripple. However, it can indicate the
possible presence of loop instability due to insufficient
ESR. Loop instability can result in oscillations at the out-
put after line or load steps. Such perturbations are usu-
ally damped, but can cause the output voltage to rise
above or fall below the tolerance limits.
The input capacitor must meet the ripple-current
requirement (I
defined by the following equation:
For most applications, nontantalum chemistries (ceram-
ic or OS-CON) are preferred due to their resistance to
inrush surge currents typical of systems with a switch
or a connector in series with the battery. If the
MAX8720 is operated as the second stage of a two-
stage power-conversion system, tantalum input capaci-
tors are acceptable. In either configuration, choose an
input capacitor that exhibits less than +10°C tempera-
ture rise at the RMS input current for optimal reliability
and lifetime.
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N
the resistive losses plus the switching losses at both
V
should be roughly equal to the losses at V
lower losses in between. If the losses at V
IN(MIN)
Step-Down Controller
and V
I
RMS
RMS
=
IN(MAX)
I
OUT MAX
) imposed by the switching currents
V
(
IN
Input Capacitor Selection
Power MOSFET Selection
. Ideally, the losses at V
)
H
) must be able to dissipate
V
OUT IN
(
V
V
OUT
IN(MAX)
IN(MIN)
)
IN(MIN)
, with
are
25

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