ISL6333AIRZ Intersil, ISL6333AIRZ Datasheet - Page 33

• Manufacturer Part Number: ISL6333AIRZ
• Description: IC CTRLR PWM 3PHASE BUCK 48-QFN
• Manufacturer: Intersil

Specifications of ISL6333AIRZ

• Applications: Controller, Intel VR11
• Voltage - Input: 5 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 1.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The total gate drive power losses are dissipated among the
resistive components along the transition path and in the
bootstrap diode. The portion of the total power dissipated in
the controller itself is the power dissipated in the upper drive
path resistance, P
P
power will be dissipated by the external gate resistors (R
and R
the MOSFETs. Figures 20 and 21 show the typical upper and
lower gate drives turn-on transition path. The total power
dissipation in the controller itself, P
estimated as calculated in Equation 32:
Inductor DCR Current Sensing Component
Selection
The controllers sense each individual channel’s inductor current
by detecting the voltage across the output inductor DCR of that
channel (As described in the “Continuous Current Sensing” on
page 21). As Figure 22 illustrates, an R-C network is required to
accurately sense the inductor DCR voltage and convert this
information into a current, which is proportional to the total
output current. The time constant of this R-C network must
match the time constant of the inductor L/DCR.
Follow the steps below to choose the component values for
this RC network.
Once the R-C network components have been chosen, the
effective internal R
R
as well as the gain of the channel-current balance loop and the
overcurrent trip level. The effective internal R
set through a single resistor on the R
R
P
P
P
R
P
1. Choose an arbitrary value for C
2. Plug the inductor L and DCR component values, and the
DR_UP
ISEN
1
DR
DR_UP
DR_LOW
EXT1
BOOT
=
value is 0.1µF.
value for C
calculate the value for R
=
G2
-------------------------
DCR C
resistance sets the gain of the load line regulation loop
P
=
, and in the boot strap diode, P
) and the internal gate resistors (R
=
DR_UP
=
L
R
=
P
---------------------
⋅
⎛
⎜
⎝
G1
Qg_Q1
--------------------------------------
R
⎛
⎜
⎝
1
HI1
--------------------------------------
R
3
+
1
HI2
+
R
-------------
R
N
chosen in step 1, into Equation 33 to
+
P
DR_UP
GI1
ISEN
HI1
Q1
R
R
+
DR_LOW
HI2
EXT1
R
EXT2
resistance must then be set. The
, the lower drive path resistance,
+
+
--------------------------------------- -
R
+
1
33
LO1
--------------------------------------- -
R
P
.
R
LO2
BOOT
EXT2
R
+
LO1
R
DR
+
R
LO2
1
SET
ISL6333, ISL6333A, ISL6333B, ISL6333C
EXT1
R
. The recommended
+
, can be roughly
=
EXT2
BOOT
(
R
I
pin, R
Q
G2
⎞ P
⎟
⎠
⋅
GI1
VCC
⋅
⎞ P
⎟
⎠
ISEN
+
. The rest of the
---------------------
⋅
Qg_Q1
---------------------
R
-------------
SET
N
and R
Qg_Q2
GI2
3
Q2
)
resistance is
2
.
GI2
(EQ. 32)
(EQ. 33)
) of
G1
Use Equation 34 to calculate the value of R
Equation 34, DCR is the DCR of the output inductor at room
temperature, I
N is the number of phases. It is recommended that the
desired overcurrent trip level, I
30% larger then the maximum load current expected.
Due to errors in the inductance or DCR it may be necessary
to adjust the value of R
correctly. The effects of time constant mismatch can be seen
in the form of droop overshoot or undershoot during the
initial load transient spike, as shown in Figure 23. Follow the
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
R
1. Capture a transient event with the oscilloscope set to
2. Record ΔV1 and ΔV2 as shown in Figure 23.
3. Select new values, R
4. Replace R
SET
MOSFET
about L/DCR/2 (sec/div). For example, with L = 1µH and
DCR = 1mΩ, set the oscilloscope to 500µs/div.
resistor based on the original value, R
Equation 35.
error is corrected. Repeat the procedure if necessary.
DRIVER
R
1 NEW
=
(
FIGURE 22. DCR SENSING CONFIGURATION
SENSE
----------------------------
100
I
DCR
n
)
×
=
OCP
10
1
R
with the new value and check to see that the
UGATE
LGATE
I
–
SEN
1 OLD
6
(
is the desired overcurrent trip level, and
⋅
ISL6333 INTERNAL
I
------------- -
OCP
+
N
-
1
)
CIRCUIT
⋅
to match the time constants
1(NEW)
Δ
----------
Δ
⋅
400
--------- -
V
V
3
1
2
R
V
ISEN
C
OCP
(s) -
, for the time constant
, be chosen so that it’s
R
INDUCTOR
1
L
V
ISEN-
ISEN+
RSET
L
I
(s)
L
V
1(OLD)
R
C
DCR
SET
SET
-
(s)
C
1
-
. In
, using
October 8, 2010
VCC
C
(EQ. 34)
V
(EQ. 35)
OUT
FN6520.3
OUT