ISL6263BHRZ Intersil, ISL6263BHRZ Datasheet - Page 12

• Manufacturer Part Number: ISL6263BHRZ
• Description: IC DC/DC BUCK CTRLR 1PH 32-QFN
• Manufacturer: Intersil

Specifications of ISL6263BHRZ

• Applications: Converter, Intel IMVP-6
• Voltage - Input: 5 ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.41 ~ 1.29 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ISL6263B will latch UGATE and PGOOD low but unlike other
protective faults, LGATE remains high until the voltage
between VO and VSS falls below approximately 0.77V, at
which time LGATE is pulled low. The LGATE pin will continue
to switch high and low at 1.545V and 0.77V until VDD has
gone below the falling POR threshold voltage
This provides maximum protection against a shorted
high-side MOSFET while preventing the output voltage from
ringing below ground. The severe-overvoltage fault circuit
can be triggered after another fault has already been
latched.
Gate-Driver Outputs LGATE and UGATE
The ISL6263B has internal high-side and low-side
N-Channel MOSFET gate-drivers. The LGATE driver is
optimized for low duty-cycle applications where the low-side
MOSFET conduction losses are dominant. The LGATE
pull-down resistance is very low in order to clamp the
gate-source voltage of the MOSFET below the V
turnoff. The current transient through the low-side gate at
turnoff can be considerable due to the characteristic large
switching charge of a low r
Overcurrent
Short Circuit
Overvoltage
(+195mV)
between VO pin
and SOFT pin
Severe
Overvoltage
(+1.55V)
between VO pin
and VSS pin
Undervoltage
(-300mV)
between VO pin
and SOFT pin
FAULT TYPE
TABLE 3. FAULT PROTECTION SUMMARY OF ISL6263B
PROTECTION
Immediately UGATE, and
DURATION
PRIOR TO
FAULT
120µs
<2µs
1ms
1ms
DS(ON)
12
LGATE, UGATE, and
PGOOD latched low
LGATE, UGATE, and
PGOOD latched low
LGATE, UGATE, and
PGOOD latched low
PGOOD latched low,
LGATE toggles ON
when VO>1.55V
OFF when
VO <0.77V
until fault reset
LGATE, UGATE, and
PGOOD latched low
PROTECTION
MOSFET.
ACTIONS
V
VDD_THF.
GS(th)
Cycle
VR_ON or
VDD
Cycle
VR_ON or
VDD
Cycle
VR_ON or
VDD
Cycle
VDD only
Cycle
VR_ON or
VDD
RESET
FAULT
at
ISL6263B
Adaptive shoot-through protection prevents the gate-driver
outputs from going high until the opposite gate-driver output
has fallen below approximately 1V. The UGATE turn-on
propagation delay t
delay t
on page 6. The power for the LGATE gate-driver is sourced
directly from the PVCC pin. The power for the UGATE
gate-driver is sourced from a boot-strap capacitor connected
across the BOOT and PHASE pins. The boot capacitor is
charged from PVCC through an internal boot-strap diode
each time the low-side MOSFET turns on, pulling the
PHASE pin low.
Internal Bootstrap Diode
The ISL6263B has an integrated boot-strap Schottky diode
connected from the PVCC pin to the BOOT pin. Simply
adding an external capacitor across the BOOT and PHASE
pins completes the bootstrap circuit.
LGATE
UGATE
FIGURE 7. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
PWM
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
PDRL
0.0
FIGURE 6. GATE DRIVER TIMING DIAGRAM
20nC
t
are found in the “Electrical Specifications” table
PDRU
0.1
VOLTAGE
0.2
Q
PDRU
GATE
0.3
= 100nC
and LGATE turn-on propagation
ΔV
0.4
t
PDRL
BOOT_CAP
0.5
0.6
(V)
0.7
0.8
0.9
July 8, 2010
FN6388.3
1V
1V
1.0