ISL6260CCRZ Intersil, ISL6260CCRZ Datasheet - Page 26
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ISL6260CCRZ
Manufacturer Part Number
ISL6260CCRZ
Description
IC REG PWM MULTI-PHASE 40-QFN
Manufacturer
Intersil
Datasheet
1.ISL6260CCRZ.pdf
(28 pages)
Specifications of ISL6260CCRZ
Applications
Converter, Intel IMVP-6
Number Of Outputs
1
Voltage - Output
0.3 ~ 1.5 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Input
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISL6260CCRZ
Manufacturer:
Intersil
Quantity:
100
Part Number:
ISL6260CCRZ
Manufacturer:
INTERSIL
Quantity:
20 000
balance can be calculated with 2A/20A = 10%. This is the
worst case calculation, for example, the actual tolerance of
two 10% DCRs is 10%*√(2) = 7%.
There are provisions to correct the current imbalance due to
layout or to purposely divert current to certain phase for better
thermal management. Customer can put a resistor in parallel
with the current sensing capacitor on the phase of interest in
order to purposely increase the current in that phase. It is
highly recommended to use symmetrical layout in order to
achieve natural current balance.
In the case the PC board trace resistance from the inductor
to the microprocessor are not the same on all three phases,
the current will not be balanced. On the phases that have too
much trace resistance a resistor can be added in parallel
with the ISEN capacitor that will correct for the poor layout.
An estimate of the value of the resistor is as shown in
Equation 19:
where Risen is the resistance from the phase node to the
ISEN pin; usually 10kΩ. Rdcr is the DCR resistance of the
inductor. Rtrace is the trace resistance from the inductor to
the microprocessor on the phase that needs to be tweaked.
It should be measured with a good microΩ meter. Rmin is
the trace resistance from the inductor to the microproccessor
on the phase with the least resistance.
For example, if the PC board trace on one phase is 0.5mΩ
and on another trace is 0.3mΩ; and if the DCR is 1.2mΩ;
then the tweaking resistor is as shown in Equation 20:
For extremely unsymmetrical layout causing phase current
unbalance, ISL6260C applications schematics can be
modified to correct the problem.
Droop using Discrete Resistor Sensing - Static/
Dynamic Mode of Operation
When choosing current sense resistor, not only the tolerance
of the resistance is important, but also the TCR. And its
combined tolerance at a wide temperature range should be
calculated.
Figure 48 shows the equivalent circuit of a discrete current
sense approach. Figure 40 shows the simplified schematic
of this approach.
For discrete resistor current sensing circuit, the droop circuit
parameters can be solved the same way as the DCR
sensing approach with a few slight modifications.
First, there is no NTC required for thermal compensation,
therefore, the Rn resistor network in the previous section is
Rtweak
Rtweak
=
=
Risen ∗ 2 ∗ Rdcr Rtrace Rmin )
----------------------------------------------------------------------------------------------- -
10kΩ ∗ 2 ∗ 1.2
----------------------------------------------------------------------- -
[
[
[
2 ∗ 0.5 0.3
[
2 Rtrace
(
(
(
–
–
(
0.5 0.3
–
) Rmin
)
26
–
]
–
)
]
–
)
=
]
55kΩ
]
(EQ. 19)
(EQ. 20)
ISL6260C
not required. Secondly, there is no time constant matching
required, therefore, the Cn component is not needed to
match the L/DCR time constant, but this component does
indeed provide noise immunity, especially to noise voltage
caused by the ESL of the current sensing resistors. A 47pF
capacitor can be used for such purposes.
The Rs values in the previous section, Rs = 7.68k_1% are
sufficient for this approach.
Now, the input to the Droop amplifier is the Vrsense voltage.
This voltage is given by Equation 21:
The gain of the Droop amplifier, G2, must be adjusted equal
to the load line impedance. We use Equation 22:
Assuming N = 3, Rdroop = 0.0021(V/A) as per the Intel
IMVP-6+ specification, Rsense = 0.001Ω, we obtain
G2 = 6.3.
The values of Rdrp1 and Rdrp2 are selected to satisfy two
requirements. First, the ratio of Rdrp2 and Rdrp1 determine
the gain G2 = (Rdrp2/Rdrp1)+1. Second, the parallel
combination of Rdrp1 and Rdrp2 should equal the parallel
combination of the Rs resistors. Combining these
requirements gives:
Rdrp1 = G2/(G2-1) * Rs/N
Rdrp2 = (G2-1) * Rdrp1
In the example above, Rs = 7.68k, N = 3, and G2 = 6.3 so
Rdrp 3k and Rdrp2 is 15.8kΩ.
These values are extremely sensitive to layout. Once the
board has been laid out, some tweaking may be required to
adjust the full load Droop. This is fairly easy and can be
accomplished by allowing the system to achieve thermal
equilibrium at full load, and then adjusting Rdrp2 to obtain
the desired Droop value.
Power Monitor
The power monitor signal tracks the inductor current. Due to
the dynamic operation of the CPU, the inductor current is
pulsating and the power monitor signal needs to be filtered.
If the RC filter is followed by an A/D converter, the input
impedance of the A/D converter needs to be much larger
than the resistor used for the RC filter. Otherwise, the input
impedance of the A/D converter and the RC filter resistor will
construct a resistor divider causing the A/D converter
reading incorrect information. It is desirable to choose a
small RC filter resistor in order to reduce the resistor divider
effect. The ISL6260C comes with a very strong current
sinking capability, users can use kΩ resistors for the RC
filter. Some A/D converters might have 100kΩ input
impedance, 1kΩ resistor will cause 1% error. As shown in
G2
Vrsense
=
--------------------- -
Rsense
Rdroop
=
Rsense
--------------------- -
×
N
N
×
I
OUT
June 21, 2010
(EQ. 21)
(EQ. 22)
FN9259.3