ISL6217ACVZ-T Intersil, ISL6217ACVZ-T Datasheet - Page 14

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ISL6217ACVZ-T

Manufacturer Part Number
ISL6217ACVZ-T
Description
IC CTRLR PWM INTEL PENT 38-TSSOP
Manufacturer
Intersil
Datasheet

Specifications of ISL6217ACVZ-T

Applications
Controller, Intel Pentium® IMVP-IV, IMVP+
Voltage - Input
5.5 ~ 25 V
Number Of Outputs
1
Operating Temperature
-10°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-

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Battery Feed-Forward Compensation - VBAT
The ISL6217A incorporates Battery Voltage Feed-Forward
Compensation, as shown in Figure 8. This compensation
provides a constant Pulse Width Modulator Gain
independent of battery voltage. An understanding of this
gain is required for proper loop compensation. The Battery
Voltage is connected directly to the ISL6217A by way of the
VBAT pin, and the gain of the system ramp modulator is a
constant 6.0.
Fault Protection
The ISL6217A protects the CPU from damaging stress
levels. The overcurrent trip point is integral in preventing
output shorts of varying degrees from causing current spikes
that would damage a CPU. The output overvoltage and
undervoltage detection features insure a safe window of
operation for the CPU.
Output Voltage Monitoring
VSEN is connected to the local CORE Output Voltage and is
used for PGOOD, undervoltage and overvoltage sensing
only. Refer to the “Block Diagram”.
The voltage on VSEN is compared with two voltage levels
which indicate an overvoltage or undervoltage condition of
the output. Violating either of these conditions results in the
V DROOP
FIGURE 9. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6217A VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO CHANNEL
_
+
R DROOP
C SOFT
SOFT
EA+
REGULATOR
ISL6217A
FB
I DROOP
IMVP-IV_
IMVP-IV+_
REFERENCE
AMPLIFIER
ERROR
-
+
R 2
14
C 2
C 1
BALANCE
BALANCE
+
+
COMP
R1
-
-
Σ
Σ
Σ
Σ
-
-
I AVERAGE
V ERROR2
V ERROR1
+
+
AVERAGING
+
+
-
-
CURRENT
COMPARATOR
ISL6217A
COMPARATOR
CURRENT
CURRENT
SENSING
SENSING
CIRCUIT
CIRCUIT
PWM 1
PWM 2
PGOOD pin toggling low to indicate a problem with the
output voltage.
PGOOD
As previously described, the ISL6217A PGOOD pin
operates as both an input and an output. During start-up, the
PGOOD pin operates as an input. Refer to Figure 10.
As per the IMVP-IV™ and IMVP-IV+™ specification, once
the ISL6217A CORE regulator regulates to the “Boot”
voltage, it waits for the PGOOD logic HIGH signals from the
Vccp and Vcc_mch regulators. The Intersil ISL6227 is a
FIGURE 10. INTERNAL PGOOD CIRCUITRY FOR THE
EN
3ms-12ms
C DCPL
RST#
START
t
IPGT
ISEN1
ISEN2
UG2
LG2
UG1
LG1
UV# and OV#
CPU-UP# =
ISL6217A CORE VOLTAGE REGULATOR
~ 100ns
S
R
CLR
t
SET
Q
Q
+
R ISEN2
R ISEN1
V rdson
START
-
PGOOD
Q 2
Q 4
V IN
V IN
ISL6217
ISL6217A
Q 1
Q 3
V rdson
-
+
PHASE
1.2K
PHASE
L 01
IMVP4_PWRGD
I L1
CLK_ENABLE#
L 02
3.3V
I L2
10K
3.3V
10K
3.3V
C OUT
V CORE
PGOOD
PGOOD
June 30, 2005
V cc_mch
ISL6227
R LOAD
FN9107.3
V ccp

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