PM6680 STMicroelectronics, PM6680 Datasheet - Page 24

IC CTRLR DUAL STEP DOWN 32VFQFPN

PM6680

Manufacturer Part Number
PM6680
Description
IC CTRLR DUAL STEP DOWN 32VFQFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of PM6680

Applications
Controller, Notebook Power System
Voltage - Input
6 ~ 28 V
Number Of Outputs
2
Voltage - Output
0.9 ~ 5.5 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, 32-VFQFPN
Output Voltage
5 V, 0.9 V to 5.5 V, 0.9 V to 3.3 V
Output Current
0.33 A
Input Voltage
5.5 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 10 C
For Use With
497-6379 - BOARD EVALUATION FOR PM6680A497-6378 - BOARD EVALUATION FOR PM6680497-6425 - BOARD EVAL BASED ON PM6680A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Device description
7.3
24/49
Output ripple compensation and loop stability
In a classic Constant On Time control, the system regulates the valley value of the output
voltage and not the average value, as shown in
voltage ripple is source of a DC static error.
To compensate this error, an integrator network can be introduced in the control loop, by
connecting the output voltage to the COMP1/COMP2 (for the OUT1 and OUT2 sections
respectively) pin through a capacitor C
Figure 30. Circuitry for output ripple compensation
The integrator amplifier generates a current, proportional to the DC errors between the FB
voltage and Vr, which decreases the output voltage in order to compensate the total static
error, including the voltage drop on PCB traces. In addition, C
output ripple. In steady state, the voltage on COMP1/COMP2 pin is the sum of the reference
voltage Vr and the output ripple (see
reaches Vr, a fixed Ton begins and the output increases.
For example, we consider Vout = 5 V with an output ripple of ∆V = 50 mV. Considering
C
assures an AC path for the output voltage ripple. Then the COMP pin ripple is a replica of
the output ripple, with a DC value of Vr + 25 mV = 925 mV.
For more details about the output ripple compensation network, see the
Closing the integrator loop on page 37
In steady state the FB pin voltage is about Vr and the regulated output voltage depends on
the external divider:
Equation 4
INT
>> C
FILT
, the C
OUTPUT
VOLTAGE
Vr
INT
t
COMP PIN
VOLTAGE
DC voltage drop V
D
D
∆V
L
L
t
C
C
R
R
∆V
O
O
O
O
C
U
OUT
C
U
U
U
T
T
T
T
Figure
F
F
C
R
C
R
I
I
INT
L
L
in the Design guidelines.
I
I
I
I
T
T
N
N
N
N
T
T
T
T
=
CINT
as in
Vr
30). In fact when the voltage on the COMP pin
V
V
C
C
×
R
R
C
C
R
R
is about 5 V-Vr+25 mV = 4.125 V. C
O
Figure 30
O
I
I
Figure 28
N
N
2
2
1
1
O
O
T
T
1
M
M
U
U
+
F
F
P
P
T
T
B
B
R
------ -
R
2
1
I=gm(V1-Vr)
V
V
r
In this condition, the output
r
g
g
m
m
+
INT
V
V
1
1
V
V
provides an AC path for the
r
r
C
C
+
-
o
o
m
m
P
P
p
W
W
p
a
a
M
M
Section 7.13.6:
r
r
a
a
t
t
o
o
r
r
INT
PM6680

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