L6731DTR STMicroelectronics, L6731DTR Datasheet - Page 14

IC CTRLR ADJ STPDN SYNC 16-TSSOP

L6731DTR

Manufacturer Part Number
L6731DTR
Description
IC CTRLR ADJ STPDN SYNC 16-TSSOP
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6731DTR

Applications
Controller, DDR
Voltage - Input
1.8 ~ 14 V
Number Of Outputs
1
Voltage - Output
Adjustable down to 0.6V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Output Voltage
0.6 V to 18 V
Input Voltage
1.8 V to 14 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6112-2

Available stocks

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Part Number:
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Device description
14/23
low-side will turn-on before the output voltage exceeds the over-voltage threshold, because
the error amplifier will throw off balance in advance. Even if the device doesn't report an
over-voltage, the behavior is the same, because the low-side is turned-on immediately. The
following figure shows the device behavior during an over-voltage event. The output voltage
rises with a slope of 100 mV/µs, emulating in this way the breaking of the high-side
MOSFET as an over-voltage cause.
Figure 8.
The device realizes the over-current-protection (OCP) sensing the current both on the high-
side MOSFET(s) and the low-side MOSFET(s) and so 2 current limit thresholds can be set
(see OCH pin and OCL pin in
The peak current protection is active when the high-side MOSFET(s) is turned on, after a
masking time of about 100 ns. The valley-current-protection is enabled when the low-side
MOSFET(s) is turned on after a masking time of about 400 ns. If, when the soft-start phase
is completed, an over current event occurs during the on time (peak-current-protection) or
during the off time (valley-current-protection) the device enters in HICCUP mode: the high-
side and low-side MOSFET(s) are turned OFF, the soft-start capacitor is discharged with a
constant current of 10 µA and when the voltage at the SS pin reaches 0.5 V the soft-start
phase restarts. During the soft-start phase the OCP provides a constant-current-protection.
If during the T
immediately turned OFF (after the masking time and the internal delay) and returned on at
the next PWM cycle. The limit of this protection is that the T
time plus propagation delay because during the masking time the peak-current-protection is
disabled. In case of very hard short circuit, even with this short T
escalate.
The valley-current-protection is very helpful in this case to limit the current. If during the off-
time the OCL comparator triggers an over current, the high-side MOSFET(s) is not turned
on until the current is over the valley-current-limit.
This implies that, if it is necessary, some pulses of the high-side MOSFET(s) will be skipped,
guaranteeing a maximum current due to the following formula:
OVP: the low-side MOSFET is turned-on in advance
ON
Peak current limit
Valley current limit
the OCH comparator triggers an over current the high-side MOSFET(s) is
Table 4.
Pins function):
109%
ON
can't be less than masking
ON
, the current could
V
V
LGate
OUT
FB
L6731D

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